Course: PG Diploma in VLSI Physical Design at Shastra micro system, Hyderabad.
Related Course work: Overview of ASIC Design Flow, Physical Design Flow – Floor plan, power plan, Placement, Routing, Clock Tree Synthesis, Static Timing Analysis, CMOS fundamentals, Scripting languages – C Shell and TCL.
Given a technical assistance for VLSI Physical Design training.
Good understanding on RTL –to- GDSII flow.
Experience with logic synthesis and SOC Physical Design implementation tools.
Had an Experience with place and route tool RTL – GDSII Encounter.
Had an experience in floor-planning, place and route, CTS, physical verification.
Had an experience in fixing congestion issues, timing violati...