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San Francisco Bay Area United States

Looking for a full-time opportunity in the field of ASIC design and verification

Electronics / Computer Hardware

A graduate student at San jose State University with Digital design as specialization and good number of courses in Verification,Validation and Digital/Analog IC design. I am Currently looking for an full-time/Intern ship in Semiconductor industry to enhance my skills as an Physical/Digital Design, Verification,Validation. Skills: â–º Expertise in Verilog/System verilog for RTL Design â–ºExperience in programming with Constraint Random Verification, Assertion based Verification using System Verilog. â–º Skilled in Functional/Gate-level Simulation, Synthesis, and Timing analysis. â–º Strong understanding of DFT, Scan, BIST etc â–º Expertise in working with EDA simulation and synthesis tools wh...