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I am working as Sr Hardware Engineer at Mindtree Limited. I am interested in IP design, ASIC front end design and FPGA prototyping . I did M.tech in VLSI design and have experience of  2 plus years in the same area. Currently working on Bluetooth low energy IP design, development, porting it on FPGA platform for validation and porting it on custom SOC. I have experience of low power design (clock gating and power gating), CCM encryption engine design, LE privacy and data length extension (Bluetooth 4.2) feature design and implementation.

Skills - Verilog/VHDL design, C, Perl, FPGA Prototyping, ASIC design, Low power design, AHB/APB/I2C/SPI bus protocols

Tools - Extensively used Xilinx I...

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