Senior Digital IC Engineer at Mstar
Focus ISP design and Storage design
. Familiar IC Design Flow
. Familiar with Verilog and IC design and FPGA verification
. RTL implementation of Peripheral (SD Card, OTP, MIPI SLIMBus, SPI Flash, Nand Flash, Smart Card, UART)
. Familiar AMBA protocol (AXI,AHB,APB)
. Familiar Len Distortion Correction (LDC) HW Architecture
. Familiar Image Processing accelerator HW Engine Architecture
. Familiar Perl, TCL, Python,C and Assembly language
. Timing analyze