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Egypt Egypt

Digital Design Verification Engineer at ICpedia, Synopsys Inc

Front-End digital design and verification engineer with skills in these areas: Verilog/VHDL RTL coding Microprocessors/Microcontrollers SystemVerilog constrained random test environment Verification environment based on UVM methodology Assertion-Based Verification using SVA Verification tools (Synopsys VCS, Mentor Graphics QuestaSim) Familiarity with I/O & multimedia interfaces : PS2 Mouse/Keyboard UART I2C I2S S/PDIF HDMI