13 + year experience in Digital VLSI Industry Mainly emphasizing on RTL coding, Synthesis Issues, Verification and Prototyping.
• Highly proficient in Verilog, VHDL. Main area of experience is in ASIC and FPGA Verification.
• Experience in SOC and IP Verification.
• Experience of leading Verification Team and building verification environments in Verilog, VHDL, System Verilog with OVM.
• Worked primarily on verification of protocols like Ethernet, DMA, PCI, MDIO, and interface like AHB, SPI, GPIO.
• Behavioral modeling (BFM), Functional verification, Unit level/SOC level verification and simulation.
• Can develop Automated, self checking test bench: both at full chip and block level.
• C...