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Penang, Malaysia Malaysia

Principal Engineer at Efinix Technology (M) Sdn Bhd

Electronics / Computer Hardware

Chip architecture definition Competitive Analysis to ensure product competitiveness Product technology selection that optimize for targeted product platform. CPU (Dual Cortex A9) subsystem architecture definition IP selection which optimize and best suit for the product platform. Hybrid Clock network architecture definition that provide flexibility, power down capability while meeting performance and clock skew target. Lead and manage a group of junior engineer and successfully completed all design verification and Taping out all derivative devices ahead of schedule with lesser man resource and shorter TAT Explorer new product integration (3D vs Monolithic)