Many years of hands-on experience in developing high performance CPU, ASIC and large scale FPGAs. Comprehensive domain knowledge in computer, networking and storage architecture and implementation. Solid working skills with high speed serial link technology. Expert in cross clock domain issues. Familiar with all CPU/ASIC/FPGA including Xilinx/Altera design flow. Career highlights include industry first VLIW SIMD multi-core CPU development, first 100G Ethernet packet switch.