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Personal Information
Organization / Workplace
Bengaluru Area, India India
Occupation
Staff Engineer
Industry
Electronics / Computer Hardware
About
--Gone through training on scan synthesis flow, scan implementation, scan rule violation report generations and corresponding fixes for all violation. --Gone through coverage improvement by different technique. --Lockup latch implementation for different clock domain. --Testpoint analysis implementation and flow. - Knowledge in fault modeling Stuck-at, Transition, Path Delay, IDDQ, and other advanced DFT models. - Knowledge in JTAG, MBIST, Scan Insertion, ATPG, Fault Simulation and at-speed testing. - Experience with industry ATPG tools Synopsys Tetramax, Cadence Encounter Test and Mentor ...
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Presentations(5)Ìý

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Scan insertion
Scan insertionScan insertion
Scan insertion
Ìý
Spyglass dft
Spyglass dftSpyglass dft
Spyglass dft
Ìý
Burst clock controller
Burst clock controllerBurst clock controller
Burst clock controller
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