/ http://www.slideshare.net/images/logo.gif / ºÝºÝߣShare feed for ºÝºÝߣshows by User: 10kirankp https://cdn.slidesharecdn.com/profile-photo-10kirankp-48x48.jpg?cb=1597179777 - 1 year experience in pre-silicon SOC verification at Intel Technologies. - Understanding of JTAG and TAP network. Also worked on BSCAN validation with automation using Perl scripting. - Exposure to tools : Synopsys’s VCS and DVE, Cadence’s virtuoso schematic editor.