際際滷shows by User: DrewFustini / http://www.slideshare.net/images/logo.gif 際際滷shows by User: DrewFustini / Wed, 25 Nov 2020 04:06:17 GMT 際際滷Share feed for 際際滷shows by User: DrewFustini Linux on RISC-V with Open Source Hardware (Open Source Summit Japan 2020) /slideshow/linux-on-riscv-with-open-source-hardware-open-source-summit-japan-2020/239459831 linuxonrisc-vossjapan2020-201125040617
Want to run Linux on open hardware? This talk will explore how the RISC-V, an open instruction set (ISA), and open source FPGA tools can be leveraged to achieve that goal. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on a RISC-V soft-core in the ECP5 FPGA on the conference badge. I will introduce Migen, LiteX and Vexriscv, and explain how they enabled us to quickly implement an SoC in the FPGA capable of running Linux. I will also explore other Linux-capable open source RISC-V implementations, and how some are being used in industry. Finally, I will look at what Linux-capable "hard" RISC-V SoC's currently exist, and what is on the horizon for 2021. This talk is should be relevant to people who are interested in building open hardware systems capable of running Linux. It should also be useful to people who are curious about RISC-V. Software engineers may find it exciting to learn how Python can be used to for chip-level design with Migen and LiteX, and simplify building a System-on-Chip (SoC) for an FPGA. Google 際際滷s link https://tinyurl.com/y6j8lfyz]]>
Want to run Linux on open hardware? This talk will explore how the RISC-V, an open instruction set (ISA), and open source FPGA tools can be leveraged to achieve that goal. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on a RISC-V soft-core in the ECP5 FPGA on the conference badge. I will introduce Migen, LiteX and Vexriscv, and explain how they enabled us to quickly implement an SoC in the FPGA capable of running Linux. I will also explore other Linux-capable open source RISC-V implementations, and how some are being used in industry. Finally, I will look at what Linux-capable "hard" RISC-V SoC's currently exist, and what is on the horizon for 2021. This talk is should be relevant to people who are interested in building open hardware systems capable of running Linux. It should also be useful to people who are curious about RISC-V. Software engineers may find it exciting to learn how Python can be used to for chip-level design with Migen and LiteX, and simplify building a System-on-Chip (SoC) for an FPGA. Google 際際滷s link https://tinyurl.com/y6j8lfyz]]> Wed, 25 Nov 2020 04:06:17 GMT /slideshow/linux-on-riscv-with-open-source-hardware-open-source-summit-japan-2020/239459831 DrewFustini@slideshare.net(DrewFustini) Linux on RISC-V with Open Source Hardware (Open Source Summit Japan 2020) DrewFustini Want to run Linux on open hardware? This talk will explore how the RISC-V, an open instruction set (ISA), and open source FPGA tools can be leveraged to achieve that goal. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on a RISC-V soft-core in the ECP5 FPGA on the conference badge. I will introduce Migen, LiteX and Vexriscv, and explain how they enabled us to quickly implement an SoC in the FPGA capable of running Linux. I will also explore other Linux-capable open source RISC-V implementations, and how some are being used in industry. Finally, I will look at what Linux-capable "hard" RISC-V SoC's currently exist, and what is on the horizon for 2021. This talk is should be relevant to people who are interested in building open hardware systems capable of running Linux. It should also be useful to people who are curious about RISC-V. Software engineers may find it exciting to learn how Python can be used to for chip-level design with Migen and LiteX, and simplify building a System-on-Chip (SoC) for an FPGA. Google 際際滷s link https://tinyurl.com/y6j8lfyz <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/linuxonrisc-vossjapan2020-201125040617-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Want to run Linux on open hardware? This talk will explore how the RISC-V, an open instruction set (ISA), and open source FPGA tools can be leveraged to achieve that goal. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on a RISC-V soft-core in the ECP5 FPGA on the conference badge. I will introduce Migen, LiteX and Vexriscv, and explain how they enabled us to quickly implement an SoC in the FPGA capable of running Linux. I will also explore other Linux-capable open source RISC-V implementations, and how some are being used in industry. Finally, I will look at what Linux-capable &quot;hard&quot; RISC-V SoC&#39;s currently exist, and what is on the horizon for 2021. This talk is should be relevant to people who are interested in building open hardware systems capable of running Linux. It should also be useful to people who are curious about RISC-V. Software engineers may find it exciting to learn how Python can be used to for chip-level design with Migen and LiteX, and simplify building a System-on-Chip (SoC) for an FPGA. Google 際際滷s link https://tinyurl.com/y6j8lfyz
Linux on RISC-V with Open Source Hardware (Open Source Summit Japan 2020) from Drew Fustini
]]> 255 1 https://cdn.slidesharecdn.com/ss_thumbnails/linuxonrisc-vossjapan2020-201125040617-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 Linux on RISC-V with Open Hardware (ELC-E 2020) /slideshow/linux-on-riscv-with-open-hardware-elce-2020/238957508 linuxonrisc-v-201024003424
Want to run Linux on open hardware? This talk will explore how the RISC-V, an open instruction set (ISA), and open source FPGA tools can be leveraged to achieve that goal. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on a RISC-V soft-core in the ECP5 FPGA on the conference badge. I will introduce Migen, LiteX and Vexriscv, and explain how they enabled us to quickly implement an SoC in the FPGA capable of running Linux. I will also explore other Linux-capable open source RISC-V implementations, and how some are being used in industry. I will highlight that OpenHW Group has adopted the PULP Ariane from ETH Zurich for its Core-V CVA64 implementation. Finally, I will look at what Linux-capable "hard" RISC-V SoC's currently exist, and what is on the horizon for 2020 and 2021. This talk is should be relevant to people who are interested in building open hardware systems capable of running Linux. It should also be useful to people who are curious about RISC-V. Software engineers may find it exciting to learn how Python can be used to for chip-level design with Migen and LiteX, and simplify building a System-on-Chip (SoC) for an FPGA.]]>
Want to run Linux on open hardware? This talk will explore how the RISC-V, an open instruction set (ISA), and open source FPGA tools can be leveraged to achieve that goal. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on a RISC-V soft-core in the ECP5 FPGA on the conference badge. I will introduce Migen, LiteX and Vexriscv, and explain how they enabled us to quickly implement an SoC in the FPGA capable of running Linux. I will also explore other Linux-capable open source RISC-V implementations, and how some are being used in industry. I will highlight that OpenHW Group has adopted the PULP Ariane from ETH Zurich for its Core-V CVA64 implementation. Finally, I will look at what Linux-capable "hard" RISC-V SoC's currently exist, and what is on the horizon for 2020 and 2021. This talk is should be relevant to people who are interested in building open hardware systems capable of running Linux. It should also be useful to people who are curious about RISC-V. Software engineers may find it exciting to learn how Python can be used to for chip-level design with Migen and LiteX, and simplify building a System-on-Chip (SoC) for an FPGA.]]> Sat, 24 Oct 2020 00:34:24 GMT /slideshow/linux-on-riscv-with-open-hardware-elce-2020/238957508 DrewFustini@slideshare.net(DrewFustini) Linux on RISC-V with Open Hardware (ELC-E 2020) DrewFustini Want to run Linux on open hardware? This talk will explore how the RISC-V, an open instruction set (ISA), and open source FPGA tools can be leveraged to achieve that goal. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on a RISC-V soft-core in the ECP5 FPGA on the conference badge. I will introduce Migen, LiteX and Vexriscv, and explain how they enabled us to quickly implement an SoC in the FPGA capable of running Linux. I will also explore other Linux-capable open source RISC-V implementations, and how some are being used in industry. I will highlight that OpenHW Group has adopted the PULP Ariane from ETH Zurich for its Core-V CVA64 implementation. Finally, I will look at what Linux-capable "hard" RISC-V SoC's currently exist, and what is on the horizon for 2020 and 2021. This talk is should be relevant to people who are interested in building open hardware systems capable of running Linux. It should also be useful to people who are curious about RISC-V. Software engineers may find it exciting to learn how Python can be used to for chip-level design with Migen and LiteX, and simplify building a System-on-Chip (SoC) for an FPGA. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/linuxonrisc-v-201024003424-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Want to run Linux on open hardware? This talk will explore how the RISC-V, an open instruction set (ISA), and open source FPGA tools can be leveraged to achieve that goal. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on a RISC-V soft-core in the ECP5 FPGA on the conference badge. I will introduce Migen, LiteX and Vexriscv, and explain how they enabled us to quickly implement an SoC in the FPGA capable of running Linux. I will also explore other Linux-capable open source RISC-V implementations, and how some are being used in industry. I will highlight that OpenHW Group has adopted the PULP Ariane from ETH Zurich for its Core-V CVA64 implementation. Finally, I will look at what Linux-capable &quot;hard&quot; RISC-V SoC&#39;s currently exist, and what is on the horizon for 2020 and 2021. This talk is should be relevant to people who are interested in building open hardware systems capable of running Linux. It should also be useful to people who are curious about RISC-V. Software engineers may find it exciting to learn how Python can be used to for chip-level design with Migen and LiteX, and simplify building a System-on-Chip (SoC) for an FPGA.
Linux on RISC-V with Open Hardware (ELC-E 2020) from Drew Fustini
]]> 732 0 https://cdn.slidesharecdn.com/ss_thumbnails/linuxonrisc-v-201024003424-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 Linux on RISC-V (ELC 2020) /slideshow/linux-on-riscv-elc-2020-236623734/236623734 rv-elc-200705222015
Embedded Linux Conference 2020: Linux on RISC-V with open source hardware and open source FPGA tools Want to run Linux on open hardware? This talk will explore Open Source Hardware projects capable of that task, and explore how RISC-V and free software FPGA projects can be leveraged to create libre systems. This talk will explore Open Source Hardware projects relevant to Linux, including boards like BeagleBone, Olimex OLinuXino, the Reform laptop and more. I will also talk about the importance of the open RISC-V instruction set and free software FPGA toolchains. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a SoC capable of running Linux. Finally, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020.]]>
Embedded Linux Conference 2020: Linux on RISC-V with open source hardware and open source FPGA tools Want to run Linux on open hardware? This talk will explore Open Source Hardware projects capable of that task, and explore how RISC-V and free software FPGA projects can be leveraged to create libre systems. This talk will explore Open Source Hardware projects relevant to Linux, including boards like BeagleBone, Olimex OLinuXino, the Reform laptop and more. I will also talk about the importance of the open RISC-V instruction set and free software FPGA toolchains. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a SoC capable of running Linux. Finally, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020.]]> Sun, 05 Jul 2020 22:20:14 GMT /slideshow/linux-on-riscv-elc-2020-236623734/236623734 DrewFustini@slideshare.net(DrewFustini) Linux on RISC-V (ELC 2020) DrewFustini Embedded Linux Conference 2020: Linux on RISC-V with open source hardware and open source FPGA tools Want to run Linux on open hardware? This talk will explore Open Source Hardware projects capable of that task, and explore how RISC-V and free software FPGA projects can be leveraged to create libre systems. This talk will explore Open Source Hardware projects relevant to Linux, including boards like BeagleBone, Olimex OLinuXino, the Reform laptop and more. I will also talk about the importance of the open RISC-V instruction set and free software FPGA toolchains. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a SoC capable of running Linux. Finally, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/rv-elc-200705222015-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Embedded Linux Conference 2020: Linux on RISC-V with open source hardware and open source FPGA tools Want to run Linux on open hardware? This talk will explore Open Source Hardware projects capable of that task, and explore how RISC-V and free software FPGA projects can be leveraged to create libre systems. This talk will explore Open Source Hardware projects relevant to Linux, including boards like BeagleBone, Olimex OLinuXino, the Reform laptop and more. I will also talk about the importance of the open RISC-V instruction set and free software FPGA toolchains. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a SoC capable of running Linux. Finally, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020.
Linux on RISC-V (ELC 2020) from Drew Fustini
]]> 3024 0 https://cdn.slidesharecdn.com/ss_thumbnails/rv-elc-200705222015-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 Linux on RISC-V /slideshow/linux-on-riscv-235860063/235860063 rv-pint-200618183541
Linux on RISC-V from Raspberry Pint meetup]]>
Linux on RISC-V from Raspberry Pint meetup]]> Thu, 18 Jun 2020 18:35:41 GMT /slideshow/linux-on-riscv-235860063/235860063 DrewFustini@slideshare.net(DrewFustini) Linux on RISC-V DrewFustini Linux on RISC-V from Raspberry Pint meetup <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/rv-pint-200618183541-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Linux on RISC-V from Raspberry Pint meetup
Linux on RISC-V from Drew Fustini
]]> 130 0 https://cdn.slidesharecdn.com/ss_thumbnails/rv-pint-200618183541-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 How to run Linux on RISC-V (FOSS North 2020) /slideshow/how-to-run-linux-on-riscv-foss-north-2020/231222355 fossn20-200401102825
Title: How to run Linux on RISC-V (with open hardware and open source FPGA tools) Abstract: Want to run Linux with RISC-V on Open Source Hardware? This talk will explore the current options including how open source FPGA tools can be leveraged to build open Linux-capable systems. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge using only open source tools thanks to Project Trellis, yosys and nextpnr. I will explain what migen and LiteX are, and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux on VexRiscv. In conclusion, I will explore the landscape of open source chip designprojects and the Linux-capable RISC-V silicon chips on horizon for 2020, and talk about my desire to collaborate on an affordable (<$100?) OSHW Linux RISC-V board.]]>
Title: How to run Linux on RISC-V (with open hardware and open source FPGA tools) Abstract: Want to run Linux with RISC-V on Open Source Hardware? This talk will explore the current options including how open source FPGA tools can be leveraged to build open Linux-capable systems. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge using only open source tools thanks to Project Trellis, yosys and nextpnr. I will explain what migen and LiteX are, and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux on VexRiscv. In conclusion, I will explore the landscape of open source chip designprojects and the Linux-capable RISC-V silicon chips on horizon for 2020, and talk about my desire to collaborate on an affordable (<$100?) OSHW Linux RISC-V board.]]> Wed, 01 Apr 2020 10:28:25 GMT /slideshow/how-to-run-linux-on-riscv-foss-north-2020/231222355 DrewFustini@slideshare.net(DrewFustini) How to run Linux on RISC-V (FOSS North 2020) DrewFustini Title: How to run Linux on RISC-V (with open hardware and open source FPGA tools) Abstract: Want to run Linux with RISC-V on Open Source Hardware? This talk will explore the current options including how open source FPGA tools can be leveraged to build open Linux-capable systems. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge using only open source tools thanks to Project Trellis, yosys and nextpnr. I will explain what migen and LiteX are, and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux on VexRiscv. In conclusion, I will explore the landscape of open source chip designprojects and the Linux-capable RISC-V silicon chips on horizon for 2020, and talk about my desire to collaborate on an affordable (<$100?) OSHW Linux RISC-V board. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/fossn20-200401102825-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Title: How to run Linux on RISC-V (with open hardware and open source FPGA tools) Abstract: Want to run Linux with RISC-V on Open Source Hardware? This talk will explore the current options including how open source FPGA tools can be leveraged to build open Linux-capable systems. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge using only open source tools thanks to Project Trellis, yosys and nextpnr. I will explain what migen and LiteX are, and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux on VexRiscv. In conclusion, I will explore the landscape of open source chip designprojects and the Linux-capable RISC-V silicon chips on horizon for 2020, and talk about my desire to collaborate on an affordable (&lt;$100?) OSHW Linux RISC-V board.
How to run Linux on RISC-V (FOSS North 2020) from Drew Fustini
]]> 389 0 https://cdn.slidesharecdn.com/ss_thumbnails/fossn20-200401102825-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 Linux on RISC-V /slideshow/linux-on-riscv/230862017 fossn20light-200325210336
FOSS North lightning talk]]>
FOSS North lightning talk]]> Wed, 25 Mar 2020 21:03:36 GMT /slideshow/linux-on-riscv/230862017 DrewFustini@slideshare.net(DrewFustini) Linux on RISC-V DrewFustini FOSS North lightning talk <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/fossn20light-200325210336-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> FOSS North lightning talk
Linux on RISC-V from Drew Fustini
]]> 72 0 https://cdn.slidesharecdn.com/ss_thumbnails/fossn20light-200325210336-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 For the Love of Tux: Linux on RISC-V /DrewFustini/for-the-love-of-tux-linux-on-riscv xhain-tux-200215164042
From Make 'n Tell at xHain hackerspace in Berlin, I introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the importance of free software FPGA tools. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux. I finish by talking about how Fomu is a great FPGA board to get started with!]]>
From Make 'n Tell at xHain hackerspace in Berlin, I introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the importance of free software FPGA tools. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux. I finish by talking about how Fomu is a great FPGA board to get started with!]]> Sat, 15 Feb 2020 16:40:42 GMT /DrewFustini/for-the-love-of-tux-linux-on-riscv DrewFustini@slideshare.net(DrewFustini) For the Love of Tux: Linux on RISC-V DrewFustini From Make 'n Tell at xHain hackerspace in Berlin, I introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the importance of free software FPGA tools. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux. I finish by talking about how Fomu is a great FPGA board to get started with! <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/xhain-tux-200215164042-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> From Make &#39;n Tell at xHain hackerspace in Berlin, I introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the importance of free software FPGA tools. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux. I finish by talking about how Fomu is a great FPGA board to get started with!
For the Love of Tux: Linux on RISC-V from Drew Fustini
]]> 76 0 https://cdn.slidesharecdn.com/ss_thumbnails/xhain-tux-200215164042-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 Berlin Embedded Linux meetup: How to Linux on RISC-V /slideshow/berlin-embedded-linux-meetup-how-to-linux-on-riscv/228157154 berlin-elinux-200215163643
Berlin Embedded Linux meetup: How to Linux on RISC-V... with open hardware and open source FPGA tools. I will introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the important of free software FPGA tools like yosys for synthesis, and nextpnr for place and route, and how SymbiFlow is leveraging bitstream documentation from Project IceStrom (iCE40), Project Trellis (ECP5), and Project X-Ray (Xilinix). I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux. In conclusion, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020.]]>
Berlin Embedded Linux meetup: How to Linux on RISC-V... with open hardware and open source FPGA tools. I will introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the important of free software FPGA tools like yosys for synthesis, and nextpnr for place and route, and how SymbiFlow is leveraging bitstream documentation from Project IceStrom (iCE40), Project Trellis (ECP5), and Project X-Ray (Xilinix). I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux. In conclusion, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020.]]> Sat, 15 Feb 2020 16:36:43 GMT /slideshow/berlin-embedded-linux-meetup-how-to-linux-on-riscv/228157154 DrewFustini@slideshare.net(DrewFustini) Berlin Embedded Linux meetup: How to Linux on RISC-V DrewFustini Berlin Embedded Linux meetup: How to Linux on RISC-V... with open hardware and open source FPGA tools. I will introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the important of free software FPGA tools like yosys for synthesis, and nextpnr for place and route, and how SymbiFlow is leveraging bitstream documentation from Project IceStrom (iCE40), Project Trellis (ECP5), and Project X-Ray (Xilinix). I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux. In conclusion, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/berlin-elinux-200215163643-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Berlin Embedded Linux meetup: How to Linux on RISC-V... with open hardware and open source FPGA tools. I will introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the important of free software FPGA tools like yosys for synthesis, and nextpnr for place and route, and how SymbiFlow is leveraging bitstream documentation from Project IceStrom (iCE40), Project Trellis (ECP5), and Project X-Ray (Xilinix). I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux. In conclusion, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020.
Berlin Embedded Linux meetup: How to Linux on RISC-V from Drew Fustini
]]> 93 0 https://cdn.slidesharecdn.com/ss_thumbnails/berlin-elinux-200215163643-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 How to run Linux on RISC-V /slideshow/how-to-run-linux-on-riscv/226728047 fosdem20-200202115753
Want to run Linux with RISC-V on Open Source Hardware? This talk will explore the current options including how open source FPGA tools can be leveraged to build open Linux-capable systems. I will introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the important of free software FPGA tools like yosys for synthesis, and nextpnr for place and route, and how SymbiFlow is leveraging bitstream documentation from Project IceStrom (iCE40), Project Trellis (ECP5), and Project X-Ray (Xilinix). I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux. In conclusion, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020.]]>
Want to run Linux with RISC-V on Open Source Hardware? This talk will explore the current options including how open source FPGA tools can be leveraged to build open Linux-capable systems. I will introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the important of free software FPGA tools like yosys for synthesis, and nextpnr for place and route, and how SymbiFlow is leveraging bitstream documentation from Project IceStrom (iCE40), Project Trellis (ECP5), and Project X-Ray (Xilinix). I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux. In conclusion, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020.]]> Sun, 02 Feb 2020 11:57:53 GMT /slideshow/how-to-run-linux-on-riscv/226728047 DrewFustini@slideshare.net(DrewFustini) How to run Linux on RISC-V DrewFustini Want to run Linux with RISC-V on Open Source Hardware? This talk will explore the current options including how open source FPGA tools can be leveraged to build open Linux-capable systems. I will introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the important of free software FPGA tools like yosys for synthesis, and nextpnr for place and route, and how SymbiFlow is leveraging bitstream documentation from Project IceStrom (iCE40), Project Trellis (ECP5), and Project X-Ray (Xilinix). I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux. In conclusion, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/fosdem20-200202115753-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Want to run Linux with RISC-V on Open Source Hardware? This talk will explore the current options including how open source FPGA tools can be leveraged to build open Linux-capable systems. I will introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the important of free software FPGA tools like yosys for synthesis, and nextpnr for place and route, and how SymbiFlow is leveraging bitstream documentation from Project IceStrom (iCE40), Project Trellis (ECP5), and Project X-Ray (Xilinix). I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux. In conclusion, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020.
How to run Linux on RISC-V from Drew Fustini
]]> 177 0 https://cdn.slidesharecdn.com/ss_thumbnails/fosdem20-200202115753-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 FPGA Badge Hack: Linux on RISC-V /slideshow/fpga-badge-hack-linux-on-riscv/225683950 berlin-riscv-200129011523
How to run Linux on RISC-V with the Hackaday Supercon FPGA badge using LiteX and VexRiscV]]>
How to run Linux on RISC-V with the Hackaday Supercon FPGA badge using LiteX and VexRiscV]]> Wed, 29 Jan 2020 01:15:22 GMT /slideshow/fpga-badge-hack-linux-on-riscv/225683950 DrewFustini@slideshare.net(DrewFustini) FPGA Badge Hack: Linux on RISC-V DrewFustini How to run Linux on RISC-V with the Hackaday Supercon FPGA badge using LiteX and VexRiscV <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/berlin-riscv-200129011523-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> How to run Linux on RISC-V with the Hackaday Supercon FPGA badge using LiteX and VexRiscV
FPGA Badge Hack: Linux on RISC-V from Drew Fustini
]]> 190 0 https://cdn.slidesharecdn.com/ss_thumbnails/berlin-riscv-200129011523-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 RISC-V and open source chip design /slideshow/riscv-and-open-source-chip-design/225424604 nerp-riscv-200128051239
際際滷s for my presentation on RISC-V and open source chip design at PumpingStation1 hackerspace tonight https://github.com/pdp7/talks/blob/master/nerp-riscv.pdf]]>
際際滷s for my presentation on RISC-V and open source chip design at PumpingStation1 hackerspace tonight https://github.com/pdp7/talks/blob/master/nerp-riscv.pdf]]> Tue, 28 Jan 2020 05:12:38 GMT /slideshow/riscv-and-open-source-chip-design/225424604 DrewFustini@slideshare.net(DrewFustini) RISC-V and open source chip design DrewFustini 際際滷s for my presentation on RISC-V and open source chip design at PumpingStation1 hackerspace tonight https://github.com/pdp7/talks/blob/master/nerp-riscv.pdf <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/nerp-riscv-200128051239-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> 際際滷s for my presentation on RISC-V and open source chip design at PumpingStation1 hackerspace tonight https://github.com/pdp7/talks/blob/master/nerp-riscv.pdf
RISC-V and open source chip design from Drew Fustini
]]> 164 0 https://cdn.slidesharecdn.com/ss_thumbnails/nerp-riscv-200128051239-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 Introduction to Open Source Hardware, OSHWA and Open Hardware Summit /slideshow/introduction-to-open-source-hardware-oshwa-and-open-hardware-summit/218307334 oshw-36c3-200110135116
Introduction to Open Source Hardware (OSHW) including the Open Source Hardware Association (OSHWA), certified OSHW, and the Open Hardware Summit]]>
Introduction to Open Source Hardware (OSHW) including the Open Source Hardware Association (OSHWA), certified OSHW, and the Open Hardware Summit]]> Fri, 10 Jan 2020 13:51:16 GMT /slideshow/introduction-to-open-source-hardware-oshwa-and-open-hardware-summit/218307334 DrewFustini@slideshare.net(DrewFustini) Introduction to Open Source Hardware, OSHWA and Open Hardware Summit DrewFustini Introduction to Open Source Hardware (OSHW) including the Open Source Hardware Association (OSHWA), certified OSHW, and the Open Hardware Summit <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/oshw-36c3-200110135116-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Introduction to Open Source Hardware (OSHW) including the Open Source Hardware Association (OSHWA), certified OSHW, and the Open Hardware Summit
Introduction to Open Source Hardware, OSHWA and Open Hardware Summit from Drew Fustini
]]> 160 1 https://cdn.slidesharecdn.com/ss_thumbnails/oshw-36c3-200110135116-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 Linux on Open Source Hardware with Open Source chip design (36c3) /slideshow/linux-on-open-source-hardware-with-open-source-chip-design/215908592 oshw-linux-36c3-200106112923
Want to run Linux on open hardware? This talk will explore Open Source Hardware projects capable of that task, and explore how RISC-V and free software FPGA projects can be leveraged to create libre systems. Presented at the 36th Chaos Communication Congress (36c3) in Leipzig, Germany: https://fahrplan.events.ccc.de/congress/2019/Fahrplan/events/10549.html Video: https://media.ccc.de/v/36c3-10549-linux_on_open_source_hardware_with_open_source_chip_design YouTube: https://www.youtube.com/watch?v=mnOBTD9dgsg]]>
Want to run Linux on open hardware? This talk will explore Open Source Hardware projects capable of that task, and explore how RISC-V and free software FPGA projects can be leveraged to create libre systems. Presented at the 36th Chaos Communication Congress (36c3) in Leipzig, Germany: https://fahrplan.events.ccc.de/congress/2019/Fahrplan/events/10549.html Video: https://media.ccc.de/v/36c3-10549-linux_on_open_source_hardware_with_open_source_chip_design YouTube: https://www.youtube.com/watch?v=mnOBTD9dgsg]]> Mon, 06 Jan 2020 11:29:22 GMT /slideshow/linux-on-open-source-hardware-with-open-source-chip-design/215908592 DrewFustini@slideshare.net(DrewFustini) Linux on Open Source Hardware with Open Source chip design (36c3) DrewFustini Want to run Linux on open hardware? This talk will explore Open Source Hardware projects capable of that task, and explore how RISC-V and free software FPGA projects can be leveraged to create libre systems. Presented at the 36th Chaos Communication Congress (36c3) in Leipzig, Germany: https://fahrplan.events.ccc.de/congress/2019/Fahrplan/events/10549.html Video: https://media.ccc.de/v/36c3-10549-linux_on_open_source_hardware_with_open_source_chip_design YouTube: https://www.youtube.com/watch?v=mnOBTD9dgsg <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/oshw-linux-36c3-200106112923-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Want to run Linux on open hardware? This talk will explore Open Source Hardware projects capable of that task, and explore how RISC-V and free software FPGA projects can be leveraged to create libre systems. Presented at the 36th Chaos Communication Congress (36c3) in Leipzig, Germany: https://fahrplan.events.ccc.de/congress/2019/Fahrplan/events/10549.html Video: https://media.ccc.de/v/36c3-10549-linux_on_open_source_hardware_with_open_source_chip_design YouTube: https://www.youtube.com/watch?v=mnOBTD9dgsg
Linux on Open Source Hardware with Open Source chip design (36c3) from Drew Fustini
]]> 1243 6 https://cdn.slidesharecdn.com/ss_thumbnails/oshw-linux-36c3-200106112923-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 Open Source Hardware, Linux and RISC-V /slideshow/open-source-hardware-linux-and-riscv/90544713 oshw-bof-lfelc-pdx-2018-180313183536
Open Source Hardware "Birds of a Feather (BoF) session at Embedded Linux Conference 2018 in Portland. Topics include elements of open source hardware designs, applications in science, open source hardware that can run Linux, and recent libre silicon efforts including RISC-V architecture and SiFive.]]>
Open Source Hardware "Birds of a Feather (BoF) session at Embedded Linux Conference 2018 in Portland. Topics include elements of open source hardware designs, applications in science, open source hardware that can run Linux, and recent libre silicon efforts including RISC-V architecture and SiFive.]]> Tue, 13 Mar 2018 18:35:36 GMT /slideshow/open-source-hardware-linux-and-riscv/90544713 DrewFustini@slideshare.net(DrewFustini) Open Source Hardware, Linux and RISC-V DrewFustini Open Source Hardware "Birds of a Feather (BoF) session at Embedded Linux Conference 2018 in Portland. Topics include elements of open source hardware designs, applications in science, open source hardware that can run Linux, and recent libre silicon efforts including RISC-V architecture and SiFive. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/oshw-bof-lfelc-pdx-2018-180313183536-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Open Source Hardware &quot;Birds of a Feather (BoF) session at Embedded Linux Conference 2018 in Portland. Topics include elements of open source hardware designs, applications in science, open source hardware that can run Linux, and recent libre silicon efforts including RISC-V architecture and SiFive.
Open Source Hardware, Linux and RISC-V from Drew Fustini
]]> 2298 7 https://cdn.slidesharecdn.com/ss_thumbnails/oshw-bof-lfelc-pdx-2018-180313183536-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 Open Source Hardware for Good /slideshow/open-source-hardware-for-good/87178767 irl-summit-oshw-2018-180203191224
Overview of Open Source, Free Software and Open Source Hardware (OSHW). Survey of Open Source licenses that can used for OSHW projects. Highlight OSHW projects that are democratizing scientific research equipment and enabling citizen science efforts. Review OSHW projects that have become commercial products. Discussion of different OSHW boards that can run Linux.]]>
Overview of Open Source, Free Software and Open Source Hardware (OSHW). Survey of Open Source licenses that can used for OSHW projects. Highlight OSHW projects that are democratizing scientific research equipment and enabling citizen science efforts. Review OSHW projects that have become commercial products. Discussion of different OSHW boards that can run Linux.]]> Sat, 03 Feb 2018 19:12:24 GMT /slideshow/open-source-hardware-for-good/87178767 DrewFustini@slideshare.net(DrewFustini) Open Source Hardware for Good DrewFustini Overview of Open Source, Free Software and Open Source Hardware (OSHW). Survey of Open Source licenses that can used for OSHW projects. Highlight OSHW projects that are democratizing scientific research equipment and enabling citizen science efforts. Review OSHW projects that have become commercial products. Discussion of different OSHW boards that can run Linux. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/irl-summit-oshw-2018-180203191224-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Overview of Open Source, Free Software and Open Source Hardware (OSHW). Survey of Open Source licenses that can used for OSHW projects. Highlight OSHW projects that are democratizing scientific research equipment and enabling citizen science efforts. Review OSHW projects that have become commercial products. Discussion of different OSHW boards that can run Linux.
Open Source Hardware for Good from Drew Fustini
]]> 1567 4 https://cdn.slidesharecdn.com/ss_thumbnails/irl-summit-oshw-2018-180203191224-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 Autodesk EAGLE and OSH Park /DrewFustini/autodesk-eagle-and-osh-park oshpark-eagle-20171012-171012174112
Using Autodesk EAGLE with OSH Park PCB ordering service. Questions? Email: support@oshpark.com]]>
Using Autodesk EAGLE with OSH Park PCB ordering service. Questions? Email: support@oshpark.com]]> Thu, 12 Oct 2017 17:41:12 GMT /DrewFustini/autodesk-eagle-and-osh-park DrewFustini@slideshare.net(DrewFustini) Autodesk EAGLE and OSH Park DrewFustini Using Autodesk EAGLE with OSH Park PCB ordering service. Questions? Email: support@oshpark.com <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/oshpark-eagle-20171012-171012174112-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Using Autodesk EAGLE with OSH Park PCB ordering service. Questions? Email: support@oshpark.com
Autodesk EAGLE and OSH Park from Drew Fustini
]]> 301 3 https://cdn.slidesharecdn.com/ss_thumbnails/oshpark-eagle-20171012-171012174112-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 BeagleBone Blue at Maker Faire 2017 /slideshow/beaglebone-blue-at-maker-faire-2017/76185587 makerfaire2017-170521183236
BeagleBone Blue at Maker Faire Bay Area 2017]]>
BeagleBone Blue at Maker Faire Bay Area 2017]]> Sun, 21 May 2017 18:32:36 GMT /slideshow/beaglebone-blue-at-maker-faire-2017/76185587 DrewFustini@slideshare.net(DrewFustini) BeagleBone Blue at Maker Faire 2017 DrewFustini BeagleBone Blue at Maker Faire Bay Area 2017 <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/makerfaire2017-170521183236-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> BeagleBone Blue at Maker Faire Bay Area 2017
BeagleBone Blue at Maker Faire 2017 from Drew Fustini
]]> 485 5 https://cdn.slidesharecdn.com/ss_thumbnails/makerfaire2017-170521183236-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 Open Source Hardware and Libre Silicon /slideshow/open-source-hardware-and-libre-silicon/75498563 penguicon17-oshw-fustini-170428110540
My Open Source Hardware and Libre Silicon talk for Penguicon 2017. Open Source Hardware (OSHW) designs are made publicly available so that anyone can study, modify, distribute, make or sell designs or hardware based on that design. This talk will explore the shared values with Open Source software and the specifics of publishing a hardware project under an Open Source license. It will include examples of Linux running on OSHW with projects like BeagleBone, CHIP, MinnowBoard and more. The role of the Open Source Hardware Association and annual Open Hardware Summit will also be discussed, along with important OSHW projects for scientific researchers. There are exciting new developments within the last year for OSHW at the chip level. Projects like lowRISC, J-Core, OnChip and SiFive are working to produce true Open Source silicon processors. The FOSSi Foundation and LibreCores are helping to organize and promote this exciting new ecosystem. ]]>
My Open Source Hardware and Libre Silicon talk for Penguicon 2017. Open Source Hardware (OSHW) designs are made publicly available so that anyone can study, modify, distribute, make or sell designs or hardware based on that design. This talk will explore the shared values with Open Source software and the specifics of publishing a hardware project under an Open Source license. It will include examples of Linux running on OSHW with projects like BeagleBone, CHIP, MinnowBoard and more. The role of the Open Source Hardware Association and annual Open Hardware Summit will also be discussed, along with important OSHW projects for scientific researchers. There are exciting new developments within the last year for OSHW at the chip level. Projects like lowRISC, J-Core, OnChip and SiFive are working to produce true Open Source silicon processors. The FOSSi Foundation and LibreCores are helping to organize and promote this exciting new ecosystem. ]]> Fri, 28 Apr 2017 11:05:40 GMT /slideshow/open-source-hardware-and-libre-silicon/75498563 DrewFustini@slideshare.net(DrewFustini) Open Source Hardware and Libre Silicon DrewFustini My Open Source Hardware and Libre Silicon talk for Penguicon 2017. Open Source Hardware (OSHW) designs are made publicly available so that anyone can study, modify, distribute, make or sell designs or hardware based on that design. This talk will explore the shared values with Open Source software and the specifics of publishing a hardware project under an Open Source license. It will include examples of Linux running on OSHW with projects like BeagleBone, CHIP, MinnowBoard and more. The role of the Open Source Hardware Association and annual Open Hardware Summit will also be discussed, along with important OSHW projects for scientific researchers. There are exciting new developments within the last year for OSHW at the chip level. Projects like lowRISC, J-Core, OnChip and SiFive are working to produce true Open Source silicon processors. The FOSSi Foundation and LibreCores are helping to organize and promote this exciting new ecosystem. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/penguicon17-oshw-fustini-170428110540-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> My Open Source Hardware and Libre Silicon talk for Penguicon 2017. Open Source Hardware (OSHW) designs are made publicly available so that anyone can study, modify, distribute, make or sell designs or hardware based on that design. This talk will explore the shared values with Open Source software and the specifics of publishing a hardware project under an Open Source license. It will include examples of Linux running on OSHW with projects like BeagleBone, CHIP, MinnowBoard and more. The role of the Open Source Hardware Association and annual Open Hardware Summit will also be discussed, along with important OSHW projects for scientific researchers. There are exciting new developments within the last year for OSHW at the chip level. Projects like lowRISC, J-Core, OnChip and SiFive are working to produce true Open Source silicon processors. The FOSSi Foundation and LibreCores are helping to organize and promote this exciting new ecosystem.
Open Source Hardware and Libre Silicon from Drew Fustini
]]> 866 6 https://cdn.slidesharecdn.com/ss_thumbnails/penguicon17-oshw-fustini-170428110540-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 Intro to Open Source Hardware (OSHW) /slideshow/intro-to-open-source-hardware-oshw/73574254 oshw-fustini-2017-170324051423
Introduction to Open Source Hardware (OSHW) including: the philosophy, best practices, CERN Open Hardware License, Open Hardware Summit, Open Source Hardware Association (OSHWA), Open Source Hardware Certification Program, OSHW Products, Linux on OSHW, and OSHW in Science.]]>
Introduction to Open Source Hardware (OSHW) including: the philosophy, best practices, CERN Open Hardware License, Open Hardware Summit, Open Source Hardware Association (OSHWA), Open Source Hardware Certification Program, OSHW Products, Linux on OSHW, and OSHW in Science.]]> Fri, 24 Mar 2017 05:14:23 GMT /slideshow/intro-to-open-source-hardware-oshw/73574254 DrewFustini@slideshare.net(DrewFustini) Intro to Open Source Hardware (OSHW) DrewFustini Introduction to Open Source Hardware (OSHW) including: the philosophy, best practices, CERN Open Hardware License, Open Hardware Summit, Open Source Hardware Association (OSHWA), Open Source Hardware Certification Program, OSHW Products, Linux on OSHW, and OSHW in Science. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/oshw-fustini-2017-170324051423-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Introduction to Open Source Hardware (OSHW) including: the philosophy, best practices, CERN Open Hardware License, Open Hardware Summit, Open Source Hardware Association (OSHWA), Open Source Hardware Certification Program, OSHW Products, Linux on OSHW, and OSHW in Science.
Intro to Open Source Hardware (OSHW) from Drew Fustini
]]> 2649 8 https://cdn.slidesharecdn.com/ss_thumbnails/oshw-fustini-2017-170324051423-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 Portland Science Hack Day: Open Source Hardware /slideshow/portland-science-hack-day-open-source-hardware/66777665 pdx-sci-hack-oshw-fustini-2016-161005183100
Overview of Open Source Hardware for Portland Science Hack Day, on Friday night, October 7th, 2016: http://portland.sciencehackday.org/]]>
Overview of Open Source Hardware for Portland Science Hack Day, on Friday night, October 7th, 2016: http://portland.sciencehackday.org/]]> Wed, 05 Oct 2016 18:31:00 GMT /slideshow/portland-science-hack-day-open-source-hardware/66777665 DrewFustini@slideshare.net(DrewFustini) Portland Science Hack Day: Open Source Hardware DrewFustini Overview of Open Source Hardware for Portland Science Hack Day, on Friday night, October 7th, 2016: http://portland.sciencehackday.org/ <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/pdx-sci-hack-oshw-fustini-2016-161005183100-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Overview of Open Source Hardware for Portland Science Hack Day, on Friday night, October 7th, 2016: http://portland.sciencehackday.org/
Portland Science Hack Day: Open Source Hardware from Drew Fustini
]]> 847 6 https://cdn.slidesharecdn.com/ss_thumbnails/pdx-sci-hack-oshw-fustini-2016-161005183100-thumbnail.jpg?width=120&height=120&fit=bounds presentation Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 https://cdn.slidesharecdn.com/profile-photo-DrewFustini-48x48.jpg?cb=1680323331 Fascinated by embedded systems and the Linux kernel. Advocate for Open Source Hardware & Open Source Software. www.google.com/profiles/pdp7pdp7 https://cdn.slidesharecdn.com/ss_thumbnails/linuxonrisc-vossjapan2020-201125040617-thumbnail.jpg?width=320&height=320&fit=bounds slideshow/linux-on-riscv-with-open-source-hardware-open-source-summit-japan-2020/239459831 Linux on RISC-V with O... https://cdn.slidesharecdn.com/ss_thumbnails/linuxonrisc-v-201024003424-thumbnail.jpg?width=320&height=320&fit=bounds slideshow/linux-on-riscv-with-open-hardware-elce-2020/238957508 Linux on RISC-V with O... https://cdn.slidesharecdn.com/ss_thumbnails/rv-elc-200705222015-thumbnail.jpg?width=320&height=320&fit=bounds slideshow/linux-on-riscv-elc-2020-236623734/236623734 Linux on RISC-V (ELC 2...