際際滷shows by User: HARISHPNAIK / http://www.slideshare.net/images/logo.gif 際際滷shows by User: HARISHPNAIK / 際際滷Share feed for 際際滷shows by User: HARISHPNAIK https://cdn.slidesharecdn.com/profile-photo-HARISHPNAIK-48x48.jpg?cb=1569656701 Presently working as a AEE in ITI limited.Completed M.Tech (VLSI and Embedded Systems) from Sri Siddhartha Institute of Technology, Tumkur. Aware of Verilog HDL, C , Synthesis,and physical design concepts. Worked on projects wherein Verilog coding and implementation on FPGA is done during the curriculum.I started studying electronic and communication subject from past 8 years so that I am very good in theoretical and practical knowledge in electronics field. my goal is that i want to contribute my knowledge and my ideas to upcoming generation. Specialties: VLSI circuit design, low power circuit design,digital electronics, embedded systems,logic design, Xinlix, matlab, pc hardware & net... http://www.site.com/sites/harishnaik/kp