/ http://www.slideshare.net/images/logo.gif / ºÝºÝߣShare feed for ºÝºÝߣshows by User: PallaviRMirajkar https://cdn.slidesharecdn.com/profile-photo-PallaviRMirajkar-48x48.jpg?cb=1486019967 • Primary area of work: BIST, Scan and ATPG. • Scan Insertion, ATPG pattern generation, pattern validation and simulation for SoCs and IPs in both timing and no-timing corners Specialties: VLSI TOOLS - Synopsis - TETRAMAX, DFTCOMPILER, VCS Cadence - NCSIM