/ http://www.slideshare.net/images/logo.gif / 際際滷Share feed for 際際滷shows by User: PyungsuHan https://cdn.slidesharecdn.com/profile-photo-PyungsuHan-48x48.jpg?cb=1523388178 - CMOS analog/mixed/digital circuit design & test - Bandgap, Regulator - Multi-gbps serial link CDR/Equalizer/Transmitter/PLL - Signal integrity Channel modeling/simulation - Verilog Coding/synthesis/FPGA implementation - Full custom layout 0.35um ~ 16nm - Script/language Python, Skill, C, shell script, awk, sed, gnuplot - Tool HSPICE, Virtuoso, Laker, Spectre, Matlab/Octave - Projects DisplayPort, Vx1 (link layer), MIPI DPHY, MIPI MPHY - Language Korean, English, Japanese