/ http://www.slideshare.net/images/logo.gif / 際際滷Share feed for 際際滷shows by User: RaghavendraKamath3 https://cdn.slidesharecdn.com/profile-photo-RaghavendraKamath3-48x48.jpg?cb=1420265580 Specialties HDLs: Verilog. HVL: SystemVerilog. Methodology:UVM. Protocols: APB,AHB,I2C,UART. EDA Tool: Modelsim,VCS,NcSim,Questa,OneSpin and Questa Formal Verification. Knowledge:RTL Coding,FSM based design,Simulation,Code Coverage,Functional Coverage,Assertion Based Verification.