/ http://www.slideshare.net/images/logo.gif / 際際滷Share feed for 際際滷shows by User: RameshNarasannagari https://cdn.slidesharecdn.com/profile-photo-RameshNarasannagari-48x48.jpg?cb=1641801209 OBJECTIVE Seeking a challenging role in the field of IT as ASIC Design/Verification Engineer to contribute towards organizational success and grow to a Senior Management level. Company : MINDTREE CONSULTING LTD., Bangalore The following are the projects undertaken. 1. FPGA implementation of 24 taps FIR Filter using Verilog HDL 2. Implementation of UART transceiver module 3. Electronic Syste...