/ http://www.slideshare.net/images/logo.gif / ºÝºÝߣShare feed for ºÝºÝߣshows by User: ameershaik9237 https://cdn.slidesharecdn.com/profile-photo-ameershaik9237-48x48.jpg?cb=1523508925 Working in Synapse Techno Design as a Physical Design Engineer. - Having Industry oriented knowledge on Physical Design. - 1.3 years of experience in Bharat Electronics Limited as a contract Engineer - Good understanding of the CMOS Design, Digital Design, ASIC design flow. - Expertise in Synthesis and Physical Design. - Good knowledge in Static Timing Analysis and Cross Talk Analysis. - Good Understanding of IR-DROP and OCV. - Designed Standard Cells in Full Custom Design at 40nm. Familiar with EDA Tools like : - Cadence SOC Encounter –Floor Planning, Placement,Clock Tree Synthesis(CTS), Route,RC Extraction. - Encounter Timing System –Static Timing Analysis and Crosstalk Analy