/ http://www.slideshare.net/images/logo.gif / 際際滷Share feed for 際際滷shows by User: asharaniachar https://cdn.slidesharecdn.com/profile-photo-asharaniachar-48x48.jpg?cb=1523633741 * Working on Full chip PMIC IC verification for Texas Instruments, Dallas through KarMic Design Pvt. Ltd. *~1 year of training in KarMic Design Pvt. Ltd. with exposure on circuit simulator, PSpice Macro Modelling and Analog and Mixed Signal Verification. * Developed PMIC PSpice Macro Model and validated the results of ICs like Voltage Mode Buck Converter, Gate Driver and Low Dropout Voltage Regulator. * Developed Verilog-AMS Models for Low Dropout Voltage Regulator, Buck Converter, Reference Voltage Generator and Reference Clock Generator. * Exposure to IC fabrication process. * Implemented Four Bit Vedic Multiplier module which involved Floor planning, Power planning, Delay and Ar...