/ http://www.slideshare.net/images/logo.gif / 際際滷Share feed for 際際滷shows by User: bhabaniagrawala https://cdn.slidesharecdn.com/profile-photo-bhabaniagrawala-48x48.jpg?cb=1523411872 An experienced senior digital design verification engineer with design verification of leading edge PCIe (Gen1, Gen2.0 and Switch controller), AMBA-AXI Bus, AXI-PCIe bridge, LPDDRx memory controller and L2-L3-L4 layer Router (Especially Forwarding Controller). I have little exposure to AHCI (Advanced host Controller Interface), PCDDR3 memory device and AHB Bus. Language: Verilog, System Verilog ,C Methodoligies: OVM Functional Verification: Constraint based random verification, Assertion Based Verification, Coverage based verification I have been involved in architecting, building of testbenches and verification of complex protocols like PCIe and Memory controller using System Verilo...