際際滷shows by User: bobcanna / http://www.slideshare.net/images/logo.gif 際際滷shows by User: bobcanna / 際際滷Share feed for 際際滷shows by User: bobcanna https://cdn.slidesharecdn.com/profile-photo-bobcanna-48x48.jpg?cb=1487098432 I have been engaged in ASIC/FPGA Design for the last 15 years, and did PCB/FPGA Logic Design for 10 years prior to that. I am best at ASIC/FPGA architecture and HDL design, but am also very proficient in the areas of logic synthesis, DFT, functional verification, timing closure (STA), and production release. I have acquired design experience in Computer Graphics, Imaging, and Video, throughout much of my career (SGI, Parallax Graphics, Sun, Mindset, etc.), and more recently, Communications Systems (Netlogic Microsystems, RF Microdevices, and Loral Space & Communications). I was ASIC Design Project Lead while at Netlogic Microsystems.