/ http://www.slideshare.net/images/logo.gif / 際際滷Share feed for 際際滷shows by User: guptavidushi https://cdn.slidesharecdn.com/profile-photo-guptavidushi-48x48.jpg?cb=1524239192 Working as a System Design Engineer in the field of telecommunication. Responsible for module level testing; Executed extensive range of testing procedures to ensure proper functionality. Responsible for Board Bring-Up. Responsible for solving technical issues and debugging of the board. Power specification and design modifications. Extensive knowledge of Signal Integrity for high speed signals and interfaces. Extensive knowledge of routing analysis. Post silicon validation testing Compliance testing for DisplayPort and HDMI port Languages: VHDL, Verilog Tools: Oscilloscopes, Mentor Graphics Hyperlynx, Xilinx ISE, TI Fusion Digital Power Designer