/ http://www.slideshare.net/images/logo.gif / ºÝºÝߣShare feed for ºÝºÝߣshows by User: ramyalakshmigunukula https://cdn.slidesharecdn.com/profile-photo-ramyalakshmigunukula-48x48.jpg?cb=1523469731 Objective To utilize, develop my technical expertise and align with company goals and work with global clients. Proficient: • Experience in writing RTL models in Verilog HDL and Testbenches in System Verilog. • Good understanding of the ASIC design flow and Digital Design. • Expertise in RTL Coding, FSM based design, Simulation, Code Coverage, Functional Coverage, Synthesis.