/ http://www.slideshare.net/images/logo.gif / ºÝºÝߣShare feed for ºÝºÝߣshows by User: shashinitw https://cdn.slidesharecdn.com/profile-photo-shashinitw-48x48.jpg?cb=1523467351 Electrical Engineering graduate with emphasis on mixed signal and IC design, with 2+ years of experience in ASIC Physical Design actively seeking full-time opportunities. Skills: Programming and Scripting languages: C, C++, Perl, TCL, VHDL, BASH & TCSH shell Software Tool’s used: Synopsys IC Compiler(ICC), Primetime, Formality, starRC, Mentor’s Calibre, Design compiler, Redhawk, SOC Encounter Cadence Virtuoso, Matlab, HSPICE, PSPICE, Simulink, PLECS, ADS.