際際滷shows by User: takeoka1 / http://www.slideshare.net/images/logo.gif 際際滷shows by User: takeoka1 / Wed, 13 Nov 2024 07:59:37 GMT 際際滷Share feed for 際際滷shows by User: takeoka1 鯵のSoC, AX1001 ができたぞ`. AX1001:the SoC for edge Devices and robot modules, /slideshow/soc-ax1001-ax1001-the-soc-for-edge-devices-and-robot-modules/273265885 ax1001-241113-241113075938-a83ecfd9
AXE's original SoC for edge devices that has enhanced RISC-V named "Shochiku-V" and "ROS2rapper" which is hardware communicating IP or ROS2.]]>

AXE's original SoC for edge devices that has enhanced RISC-V named "Shochiku-V" and "ROS2rapper" which is hardware communicating IP or ROS2.]]>
Wed, 13 Nov 2024 07:59:37 GMT /slideshow/soc-ax1001-ax1001-the-soc-for-edge-devices-and-robot-modules/273265885 takeoka1@slideshare.net(takeoka1) 鯵のSoC, AX1001 ができたぞ`. AX1001:the SoC for edge Devices and robot modules, takeoka1 AXE's original SoC for edge devices that has enhanced RISC-V named "Shochiku-V" and "ROS2rapper" which is hardware communicating IP or ROS2. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/ax1001-241113-241113075938-a83ecfd9-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> AXE&#39;s original SoC for edge devices that has enhanced RISC-V named &quot;Shochiku-V&quot; and &quot;ROS2rapper&quot; which is hardware communicating IP or ROS2.
鯵のSoC, AX1001 ができたぞ`. AX1001:the SoC for edge Devices and robot modules, from たけおか しょうぞう
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Using Retro-CPU with low aspirations, No FPGA /slideshow/using-retro-cpu-with-low-aspirations-no-fpga/270909043 hikui-kokoro-240810-240810085001-e9362269
introduction SRAM for Retro-CPU-Mania, and essay of Retro-CPU]]>

introduction SRAM for Retro-CPU-Mania, and essay of Retro-CPU]]>
Sat, 10 Aug 2024 08:50:01 GMT /slideshow/using-retro-cpu-with-low-aspirations-no-fpga/270909043 takeoka1@slideshare.net(takeoka1) Using Retro-CPU with low aspirations, No FPGA takeoka1 introduction SRAM for Retro-CPU-Mania, and essay of Retro-CPU <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/hikui-kokoro-240810-240810085001-e9362269-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> introduction SRAM for Retro-CPU-Mania, and essay of Retro-CPU
Using Retro-CPU with low aspirations, No FPGA from たけおか しょうぞう
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"ros2rapper", Hardware implimentation of ROS2 communication Protocol without Linux /slideshow/ros2rapper-hardware-implimentation-of-ros2-communication-protocol-without-linux/270236663 axeros2rapper240711a-240714153506-1dcfde1d
ROS2 communication protocol hardware IP without Linux. Useful on FPGA or ASIC. ]]>

ROS2 communication protocol hardware IP without Linux. Useful on FPGA or ASIC. ]]>
Sun, 14 Jul 2024 15:35:06 GMT /slideshow/ros2rapper-hardware-implimentation-of-ros2-communication-protocol-without-linux/270236663 takeoka1@slideshare.net(takeoka1) "ros2rapper", Hardware implimentation of ROS2 communication Protocol without Linux takeoka1 ROS2 communication protocol hardware IP without Linux. Useful on FPGA or ASIC. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/axeros2rapper240711a-240714153506-1dcfde1d-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> ROS2 communication protocol hardware IP without Linux. Useful on FPGA or ASIC.
"ros2rapper", Hardware implimentation of ROS2 communication Protocol without Linux from たけおか しょうぞう
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いにしえ議ななにか、カニか? RISC-V picoRV32, e203 個夛 オレオレ凋綜弖紗した /slideshow/riscv/264248421 riscv-inst-ext-231202a-231204010300-d61860f0
adding some simple instructions to picorv32 , RISC-V softcore]]>

adding some simple instructions to picorv32 , RISC-V softcore]]>
Mon, 04 Dec 2023 01:03:00 GMT /slideshow/riscv/264248421 takeoka1@slideshare.net(takeoka1) いにしえ議ななにか、カニか? RISC-V picoRV32, e203 個夛 オレオレ凋綜弖紗した takeoka1 adding some simple instructions to picorv32 , RISC-V softcore <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/riscv-inst-ext-231202a-231204010300-d61860f0-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> adding some simple instructions to picorv32 , RISC-V softcore
いにしえ議ななにか、カニか? RISC-V picoRV32, e203 個夛 オレオレ凋綜弖紗した from たけおか しょうぞう
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SOAR:Smalltalk on RISC /slideshow/soarsmalltalk-on-risc/259353283 soar-230722a-230722084455-285db7b3
introduction of SOAR(Smalltalk on RISC) in Japanese]]>

introduction of SOAR(Smalltalk on RISC) in Japanese]]>
Sat, 22 Jul 2023 08:44:55 GMT /slideshow/soarsmalltalk-on-risc/259353283 takeoka1@slideshare.net(takeoka1) SOAR:Smalltalk on RISC takeoka1 introduction of SOAR(Smalltalk on RISC) in Japanese <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/soar-230722a-230722084455-285db7b3-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> introduction of SOAR(Smalltalk on RISC) in Japanese
SOAR:Smalltalk on RISC from たけおか しょうぞう
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鯵粥皆鴛遺と鯵遺永雨^防幢閣(しょうちくぶい) ̄ /slideshow/asiccpuv/255325337 ore-asic-230115-230115090431-8d276b3e
We are developping SoC for small robot devices with accelalator for Prolog and hardware multi thread.]]>

We are developping SoC for small robot devices with accelalator for Prolog and hardware multi thread.]]>
Sun, 15 Jan 2023 09:04:31 GMT /slideshow/asiccpuv/255325337 takeoka1@slideshare.net(takeoka1) 鯵粥皆鴛遺と鯵遺永雨^防幢閣(しょうちくぶい) ̄ takeoka1 We are developping SoC for small robot devices with accelalator for Prolog and hardware multi thread. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/ore-asic-230115-230115090431-8d276b3e-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> We are developping SoC for small robot devices with accelalator for Prolog and hardware multi thread.
鯵粥皆鴛遺と鯵遺永雨^防幢閣(しょうちくぶい) ̄ from たけおか しょうぞう
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あるRISC-V CPUの 検嗤(泣方(械なし) /takeoka1/riscv-cpu float-numcalc220827-220829191808-6ea75cc5
rounding of a RISC-V core. Whetstone Benchmarks on several CPU.]]>

rounding of a RISC-V core. Whetstone Benchmarks on several CPU.]]>
Mon, 29 Aug 2022 19:18:07 GMT /takeoka1/riscv-cpu takeoka1@slideshare.net(takeoka1) あるRISC-V CPUの 検嗤(泣方(械なし) takeoka1 rounding of a RISC-V core. Whetstone Benchmarks on several CPU. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/float-numcalc220827-220829191808-6ea75cc5-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> rounding of a RISC-V core. Whetstone Benchmarks on several CPU.
あるRISC-V CPUの 検嗤(泣方(械なし) from たけおか しょうぞう
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檎鴛皆遺-閣の辛嬬來 /slideshow/riscv-251394163/251394163 riscv-shosinsha-220318s-220322012546
兜伉宀鬚韻法檎鴛皆遺-閣の辛嬬來を峰べる]]>

兜伉宀鬚韻法檎鴛皆遺-閣の辛嬬來を峰べる]]>
Tue, 22 Mar 2022 01:25:45 GMT /slideshow/riscv-251394163/251394163 takeoka1@slideshare.net(takeoka1) 檎鴛皆遺-閣の辛嬬來 takeoka1 兜伉宀鬚韻法檎鴛皆遺-閣の辛嬬來を峰べる <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/riscv-shosinsha-220318s-220322012546-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> 兜伉宀鬚韻法檎鴛皆遺-閣の辛嬬來を峰べる
檎鴛皆遺-閣の辛嬬來 from たけおか しょうぞう
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檎鴛皆遺-閣の辛嬬來 /slideshow/riscv-251375248/251375248 riscv-shosinsha-220318s-220318110712
兜伉宀鬚臼娜>

兜伉宀鬚臼娜>
Fri, 18 Mar 2022 11:07:12 GMT /slideshow/riscv-251375248/251375248 takeoka1@slideshare.net(takeoka1) 檎鴛皆遺-閣の辛嬬來 takeoka1 兜伉宀鬚 <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/riscv-shosinsha-220318s-220318110712-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> 兜伉宀鬚
檎鴛皆遺-閣の辛嬬來 from たけおか しょうぞう
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どうして劣の繁は伊序方でしゃべるのか? /slideshow/ss-250690010/250690010 octal-211120074650
伊M方と兆Cの凋綜コ`ド?フォ`マットのvS Why Old men talk in Octal-code?]]>

伊M方と兆Cの凋綜コ`ド?フォ`マットのvS Why Old men talk in Octal-code?]]>
Sat, 20 Nov 2021 07:46:49 GMT /slideshow/ss-250690010/250690010 takeoka1@slideshare.net(takeoka1) どうして劣の繁は伊序方でしゃべるのか? takeoka1 伊M方と兆Cの凋綜コ`ド?フォ`マットのvS Why Old men talk in Octal-code? <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/octal-211120074650-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> 伊M方と兆Cの凋綜コ`ド?フォ`マットのvS Why Old men talk in Octal-code?
どうして劣の繁は伊序方でしゃべるのか? from たけおか しょうぞう
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Riscv+fpga200606 /slideshow/riscvfpga200606/235105200 riscvfpga200606-200606070219
Intro of RISC-V Micro Controllers and RISC-V core on Tang FPGA ]]>

Intro of RISC-V Micro Controllers and RISC-V core on Tang FPGA ]]>
Sat, 06 Jun 2020 07:02:19 GMT /slideshow/riscvfpga200606/235105200 takeoka1@slideshare.net(takeoka1) Riscv+fpga200606 takeoka1 Intro of RISC-V Micro Controllers and RISC-V core on Tang FPGA <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/riscvfpga200606-200606070219-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Intro of RISC-V Micro Controllers and RISC-V core on Tang FPGA
Riscv+fpga200606 from たけおか しょうぞう
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Takep lpc1114-190614 /slideshow/takep-lpc1114190614/149639476 takep-lpc1114-190614-190614100324
micro controller board]]>

micro controller board]]>
Fri, 14 Jun 2019 10:03:23 GMT /slideshow/takep-lpc1114190614/149639476 takeoka1@slideshare.net(takeoka1) Takep lpc1114-190614 takeoka1 micro controller board <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/takep-lpc1114-190614-190614100324-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> micro controller board
Takep lpc1114-190614 from たけおか しょうぞう
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Takep lpc1114-190613 /slideshow/takep-lpc1114190613/149439247 takep-lpc1114-190613-190613133005
micro controller board]]>

micro controller board]]>
Thu, 13 Jun 2019 13:30:05 GMT /slideshow/takep-lpc1114190613/149439247 takeoka1@slideshare.net(takeoka1) Takep lpc1114-190613 takeoka1 micro controller board <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/takep-lpc1114-190613-190613133005-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> micro controller board
Takep lpc1114-190613 from たけおか しょうぞう
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兜i議な何瞳の岑紛 /slideshow/ss-149304843/149304843 parts-190612140028
兜i議な何瞳の岑紛。晩云の何瞳]]>

兜i議な何瞳の岑紛。晩云の何瞳]]>
Wed, 12 Jun 2019 14:00:28 GMT /slideshow/ss-149304843/149304843 takeoka1@slideshare.net(takeoka1) 兜i議な何瞳の岑紛 takeoka1 兜i議な何瞳の岑紛。晩云の何瞳 <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/parts-190612140028-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> 兜i議な何瞳の岑紛。晩云の何瞳
兜i議な何瞳の岑紛 from たけおか しょうぞう
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Takepino LPC1114 /slideshow/takepino-lpc1114/149281617 takep-lpc1114-190505-190612060950
Micro Controller Board with LPC1114 (ARM Cortex-M0) ]]>

Micro Controller Board with LPC1114 (ARM Cortex-M0) ]]>
Wed, 12 Jun 2019 06:09:50 GMT /slideshow/takepino-lpc1114/149281617 takeoka1@slideshare.net(takeoka1) Takepino LPC1114 takeoka1 Micro Controller Board with LPC1114 (ARM Cortex-M0) <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/takep-lpc1114-190505-190612060950-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Micro Controller Board with LPC1114 (ARM Cortex-M0)
Takepino LPC1114 from たけおか しょうぞう
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Lisp_chibi_machine 190427 /slideshow/lispchibimachine-190427/142589308 lispchibi-190427-190428015111
Very small Lisp Machines]]>

Very small Lisp Machines]]>
Sun, 28 Apr 2019 01:51:10 GMT /slideshow/lispchibimachine-190427/142589308 takeoka1@slideshare.net(takeoka1) Lisp_chibi_machine 190427 takeoka1 Very small Lisp Machines <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/lispchibi-190427-190428015111-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Very small Lisp Machines
Lisp_chibi_machine 190427 from たけおか しょうぞう
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oスマ`トスピ`カを 埆えレレレのレ /slideshow/ss-115163695/115163695 vui180914d-180918101620
Beyond Smart Speakers with Real Logical Inference AI]]>

Beyond Smart Speakers with Real Logical Inference AI]]>
Tue, 18 Sep 2018 10:16:19 GMT /slideshow/ss-115163695/115163695 takeoka1@slideshare.net(takeoka1) oスマ`トスピ`カを 埆えレレレのレ takeoka1 Beyond Smart Speakers with Real Logical Inference AI <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/vui180914d-180918101620-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Beyond Smart Speakers with Real Logical Inference AI
oスマ`トスピ`カを 埆えレレレのレ from たけおか しょうぞう
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Common Lisp ユ`ザへのSchemeB初 /takeoka1/common-lisp-scheme-102882269 scheme-cl-180623-180624091705
Common Lisp を岑っている繁に、SchemeをXくB初]]>

Common Lisp を岑っている繁に、SchemeをXくB初]]>
Sun, 24 Jun 2018 09:17:05 GMT /takeoka1/common-lisp-scheme-102882269 takeoka1@slideshare.net(takeoka1) Common Lisp ユ`ザへのSchemeB初 takeoka1 Common Lisp を岑っている繁に、SchemeをXくB初 <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/scheme-cl-180623-180624091705-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Common Lisp を岑っている繁に、SchemeをXくB初
Common Lisp ユ`ザへのSchemeB初 from たけおか しょうぞう
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RISC-V User level ISA /slideshow/riscv-user-level-isa/82300056 riscv-isa-171118-171119040007
Risc-V spec V2.2 User level ISA]]>

Risc-V spec V2.2 User level ISA]]>
Sun, 19 Nov 2017 04:00:07 GMT /slideshow/riscv-user-level-isa/82300056 takeoka1@slideshare.net(takeoka1) RISC-V User level ISA takeoka1 Risc-V spec V2.2 User level ISA <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/riscv-isa-171118-171119040007-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Risc-V spec V2.2 User level ISA
RISC-V User level ISA from たけおか しょうぞう
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晦庄壊沿マシン?シミュレ`タの府初 /slideshow/lisp-80551526/80551526 lispm-sim-171006s-171007073302
Intorduce some Lisp Machine Simulator]]>

Intorduce some Lisp Machine Simulator]]>
Sat, 07 Oct 2017 07:33:02 GMT /slideshow/lisp-80551526/80551526 takeoka1@slideshare.net(takeoka1) 晦庄壊沿マシン?シミュレ`タの府初 takeoka1 Intorduce some Lisp Machine Simulator <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/lispm-sim-171006s-171007073302-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Intorduce some Lisp Machine Simulator
晦庄壊沿マシン?シミュレ`タの府初 from たけおか しょうぞう
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https://cdn.slidesharecdn.com/profile-photo-takeoka1-48x48.jpg?cb=1731484660 徭各プログラマ。K双麻が挫き、催I尖が挫き、ベクトル?マシン挫きな、マイコン弌筆 twitter ID: takeoka Mzみシステム室gf氏 室g云何云何L、尖並、OSS試喘溜T氏溜TL ( http://jasa.or.jp/ ) OSSコンソ`シアム 険氏L、尖並 (http://osscons.jp/) PCクラスタコンソ`シアム 尖並 (http://www.pccluster.org/) v廉*BSDユ`ザ氏(K*BUG)\嗄T (http://www.kbug.gr.jp/) ホ`ムペ`ジなど http://www.takeoka.org/~take/ http://ameblo.jp/takeoka/ http://b.hatena.ne.jp/takeokas/ https://cdn.slidesharecdn.com/ss_thumbnails/ax1001-241113-241113075938-a83ecfd9-thumbnail.jpg?width=320&height=320&fit=bounds slideshow/soc-ax1001-ax1001-the-soc-for-edge-devices-and-robot-modules/273265885 鯵のSoC, AX1001 ができたぞ`. ... https://cdn.slidesharecdn.com/ss_thumbnails/hikui-kokoro-240810-240810085001-e9362269-thumbnail.jpg?width=320&height=320&fit=bounds slideshow/using-retro-cpu-with-low-aspirations-no-fpga/270909043 Using Retro-CPU with l... https://cdn.slidesharecdn.com/ss_thumbnails/axeros2rapper240711a-240714153506-1dcfde1d-thumbnail.jpg?width=320&height=320&fit=bounds slideshow/ros2rapper-hardware-implimentation-of-ros2-communication-protocol-without-linux/270236663 &quot;ros2rapper&quot;, Hardware...