�ݺ�ߣshows by User: tlavian

�ݺ�ߣshows by User: tlavian / http://www.slideshare.net/images/logo.gif �ݺ�ߣshows by User: tlavian / Thu, 18 Jun 2020 14:20:42 GMT �ݺ�ߣShare feed for �ݺ�ߣshows by User: tlavian Ultra low phase noise frequency synthesizer /slideshow/ultra-low-phase-noise-frequency-synthesizer-235849953/235849953 wo2016203460a2-200618142042
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.]]>
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.]]> Thu, 18 Jun 2020 14:20:42 GMT /slideshow/ultra-low-phase-noise-frequency-synthesizer-235849953/235849953 tlavian@slideshare.net(tlavian) Ultra low phase noise frequency synthesizer tlavian A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/wo2016203460a2-200618142042-thumbnail.jpg?width=120&height=120&fit=bounds" /> A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.

Ultra low phase noise frequency synthesizer from Tal Lavian Ph.D.

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0 Ultra low phase noise frequency synthesizer /tlavian/ultra-low-phase-noise-frequency-synthesizer-235849819 ca2989752a1-200618141751
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.]]>
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.]]> Thu, 18 Jun 2020 14:17:51 GMT /tlavian/ultra-low-phase-noise-frequency-synthesizer-235849819 tlavian@slideshare.net(tlavian) Ultra low phase noise frequency synthesizer tlavian A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/ca2989752a1-200618141751-thumbnail.jpg?width=120&height=120&fit=bounds" /> A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.

Ultra low phase noise frequency synthesizer from Tal Lavian Ph.D.

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0 Photonic line sharing for high-speed routers /slideshow/photonic-line-sharing-for-highspeed-routers/235849736 us9021130-200618141546
Embodiments of the present invention present a method and apparatus for photonic line sharing for high-speed routers. Photonic switches receive high-speed optical data streams and produce the data streams to a router operating according to routing logic and produce optical data streams according to destination addresses stored in the data packets. Each photonic switch can be configured as one of a 1:N multiplexer or an M:N cross-connect switch. In one embodiment, optical data is converted to electrical data prior to routing, while an alternate embodiment routes only optical data. Another embodiment transfers large volumes of high-speed data through an optical bypass line in a circuit switched network to bypass the switch fabric thereby routing the data packets directly to the destination. An edge device selects one of the packet switched network or the circuit switched network. The bypass resources are released when the large volume of high-speed data is transferred.]]>
Embodiments of the present invention present a method and apparatus for photonic line sharing for high-speed routers. Photonic switches receive high-speed optical data streams and produce the data streams to a router operating according to routing logic and produce optical data streams according to destination addresses stored in the data packets. Each photonic switch can be configured as one of a 1:N multiplexer or an M:N cross-connect switch. In one embodiment, optical data is converted to electrical data prior to routing, while an alternate embodiment routes only optical data. Another embodiment transfers large volumes of high-speed data through an optical bypass line in a circuit switched network to bypass the switch fabric thereby routing the data packets directly to the destination. An edge device selects one of the packet switched network or the circuit switched network. The bypass resources are released when the large volume of high-speed data is transferred.]]> Thu, 18 Jun 2020 14:15:46 GMT /slideshow/photonic-line-sharing-for-highspeed-routers/235849736 tlavian@slideshare.net(tlavian) Photonic line sharing for high-speed routers tlavian Embodiments of the present invention present a method and apparatus for photonic line sharing for high-speed routers. Photonic switches receive high-speed optical data streams and produce the data streams to a router operating according to routing logic and produce optical data streams according to destination addresses stored in the data packets. Each photonic switch can be configured as one of a 1:N multiplexer or an M:N cross-connect switch. In one embodiment, optical data is converted to electrical data prior to routing, while an alternate embodiment routes only optical data. Another embodiment transfers large volumes of high-speed data through an optical bypass line in a circuit switched network to bypass the switch fabric thereby routing the data packets directly to the destination. An edge device selects one of the packet switched network or the circuit switched network. The bypass resources are released when the large volume of high-speed data is transferred. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us9021130-200618141546-thumbnail.jpg?width=120&height=120&fit=bounds" /> Embodiments of the present invention present a method and apparatus for photonic line sharing for high-speed routers. Photonic switches receive high-speed optical data streams and produce the data streams to a router operating according to routing logic and produce optical data streams according to destination addresses stored in the data packets. Each photonic switch can be configured as one of a 1:N multiplexer or an M:N cross-connect switch. In one embodiment, optical data is converted to electrical data prior to routing, while an alternate embodiment routes only optical data. Another embodiment transfers large volumes of high-speed data through an optical bypass line in a circuit switched network to bypass the switch fabric thereby routing the data packets directly to the destination. An edge device selects one of the packet switched network or the circuit switched network. The bypass resources are released when the large volume of high-speed data is transferred.

Photonic line sharing for high-speed routers from Tal Lavian Ph.D.

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0 Systems and methods to support sharing and exchanging in a network /slideshow/systems-and-methods-to-support-sharing-and-exchanging-in-a-network/235849684 us9083728-200618141420
Embodiments of the invention provide for providing support for sharing and exchanging in a network. The system includes a memory coupled to a processor. The memory includes a database comprising information corresponding to first users and the second users. Each of the first users and the second users are facilitated for sharing or exchanging activity, service or product, based on one or more conditions corresponding thereto. Further, the memory includes one or more instructions executable by the processor to match each of the first users to at least one of the second users. Furthermore, the instructions may inform each of the first users about the match with the at least one of the second users when all the conditions are met by the at least one second user based on the information corresponding to each of the second users.]]>
Embodiments of the invention provide for providing support for sharing and exchanging in a network. The system includes a memory coupled to a processor. The memory includes a database comprising information corresponding to first users and the second users. Each of the first users and the second users are facilitated for sharing or exchanging activity, service or product, based on one or more conditions corresponding thereto. Further, the memory includes one or more instructions executable by the processor to match each of the first users to at least one of the second users. Furthermore, the instructions may inform each of the first users about the match with the at least one of the second users when all the conditions are met by the at least one second user based on the information corresponding to each of the second users.]]> Thu, 18 Jun 2020 14:14:20 GMT /slideshow/systems-and-methods-to-support-sharing-and-exchanging-in-a-network/235849684 tlavian@slideshare.net(tlavian) Systems and methods to support sharing and exchanging in a network tlavian Embodiments of the invention provide for providing support for sharing and exchanging in a network. The system includes a memory coupled to a processor. The memory includes a database comprising information corresponding to first users and the second users. Each of the first users and the second users are facilitated for sharing or exchanging activity, service or product, based on one or more conditions corresponding thereto. Further, the memory includes one or more instructions executable by the processor to match each of the first users to at least one of the second users. Furthermore, the instructions may inform each of the first users about the match with the at least one of the second users when all the conditions are met by the at least one second user based on the information corresponding to each of the second users. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us9083728-200618141420-thumbnail.jpg?width=120&height=120&fit=bounds" /> Embodiments of the invention provide for providing support for sharing and exchanging in a network. The system includes a memory coupled to a processor. The memory includes a database comprising information corresponding to first users and the second users. Each of the first users and the second users are facilitated for sharing or exchanging activity, service or product, based on one or more conditions corresponding thereto. Further, the memory includes one or more instructions executable by the processor to match each of the first users to at least one of the second users. Furthermore, the instructions may inform each of the first users about the match with the at least one of the second users when all the conditions are met by the at least one second user based on the information corresponding to each of the second users.

Systems and methods to support sharing and exchanging in a network from Tal Lavian Ph.D.

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0 Systems and methods for visual presentation and selection of IVR menu /slideshow/systems-and-methods-for-visual-presentation-and-selection-of-ivr-menu-235849602/235849602 us9521255-200618141218
Embodiments of the invention provide a system for generating an Interactive Voice Response (IVR) database, the system comprising a processor and a memory coupled to the processor. The memory comprising a list of telephone numbers associated with one or more destinations implementing IVR menus, wherein the one or more destinations are grouped based on a plurality of categories of the IVR menus. Further the memory includes instructions executable by said processor for automatically communicating with the one of more destinations, and receiving at least one customization record from said at least one destination to store in the IVR database.]]>
Embodiments of the invention provide a system for generating an Interactive Voice Response (IVR) database, the system comprising a processor and a memory coupled to the processor. The memory comprising a list of telephone numbers associated with one or more destinations implementing IVR menus, wherein the one or more destinations are grouped based on a plurality of categories of the IVR menus. Further the memory includes instructions executable by said processor for automatically communicating with the one of more destinations, and receiving at least one customization record from said at least one destination to store in the IVR database.]]> Thu, 18 Jun 2020 14:12:18 GMT /slideshow/systems-and-methods-for-visual-presentation-and-selection-of-ivr-menu-235849602/235849602 tlavian@slideshare.net(tlavian) Systems and methods for visual presentation and selection of IVR menu tlavian Embodiments of the invention provide a system for generating an Interactive Voice Response (IVR) database, the system comprising a processor and a memory coupled to the processor. The memory comprising a list of telephone numbers associated with one or more destinations implementing IVR menus, wherein the one or more destinations are grouped based on a plurality of categories of the IVR menus. Further the memory includes instructions executable by said processor for automatically communicating with the one of more destinations, and receiving at least one customization record from said at least one destination to store in the IVR database. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us9521255-200618141218-thumbnail.jpg?width=120&height=120&fit=bounds" /> Embodiments of the invention provide a system for generating an Interactive Voice Response (IVR) database, the system comprising a processor and a memory coupled to the processor. The memory comprising a list of telephone numbers associated with one or more destinations implementing IVR menus, wherein the one or more destinations are grouped based on a plurality of categories of the IVR menus. Further the memory includes instructions executable by said processor for automatically communicating with the one of more destinations, and receiving at least one customization record from said at least one destination to store in the IVR database.

Systems and methods for visual presentation and selection of IVR menu from Tal Lavian Ph.D.

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0 Grid proxy architecture for network resources /slideshow/grid-proxy-architecture-for-network-resources-235849544/235849544 us9184989-200618141033
Various embodiments allow Grid applications to access resources shared in communication network domains. Grid Proxy Architecture for Network Resources (GPAN) bridges Grid services serving user applications and network services controlling network devices through proxy functions. At times, GPAN employs distributed network service peers (NSP) in network domains to discover, negotiate and allocate network resources for Grid applications. An elected master NSP is the unique Grid node that runs GPAN and represents the whole network to share network resources to Grids without Grid involvement of network devices. GPAN provides the Grid Proxy service (GPS) to interface with Grid services and applications, and the Grid Delegation service (GDS) to interface with network services to utilize network resources. In some cases, resource-based XML messaging can be employed for the GPAN proxy communication.]]>
Various embodiments allow Grid applications to access resources shared in communication network domains. Grid Proxy Architecture for Network Resources (GPAN) bridges Grid services serving user applications and network services controlling network devices through proxy functions. At times, GPAN employs distributed network service peers (NSP) in network domains to discover, negotiate and allocate network resources for Grid applications. An elected master NSP is the unique Grid node that runs GPAN and represents the whole network to share network resources to Grids without Grid involvement of network devices. GPAN provides the Grid Proxy service (GPS) to interface with Grid services and applications, and the Grid Delegation service (GDS) to interface with network services to utilize network resources. In some cases, resource-based XML messaging can be employed for the GPAN proxy communication.]]> Thu, 18 Jun 2020 14:10:33 GMT /slideshow/grid-proxy-architecture-for-network-resources-235849544/235849544 tlavian@slideshare.net(tlavian) Grid proxy architecture for network resources tlavian Various embodiments allow Grid applications to access resources shared in communication network domains. Grid Proxy Architecture for Network Resources (GPAN) bridges Grid services serving user applications and network services controlling network devices through proxy functions. At times, GPAN employs distributed network service peers (NSP) in network domains to discover, negotiate and allocate network resources for Grid applications. An elected master NSP is the unique Grid node that runs GPAN and represents the whole network to share network resources to Grids without Grid involvement of network devices. GPAN provides the Grid Proxy service (GPS) to interface with Grid services and applications, and the Grid Delegation service (GDS) to interface with network services to utilize network resources. In some cases, resource-based XML messaging can be employed for the GPAN proxy communication. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us9184989-200618141033-thumbnail.jpg?width=120&height=120&fit=bounds" /> Various embodiments allow Grid applications to access resources shared in communication network domains. Grid Proxy Architecture for Network Resources (GPAN) bridges Grid services serving user applications and network services controlling network devices through proxy functions. At times, GPAN employs distributed network service peers (NSP) in network domains to discover, negotiate and allocate network resources for Grid applications. An elected master NSP is the unique Grid node that runs GPAN and represents the whole network to share network resources to Grids without Grid involvement of network devices. GPAN provides the Grid Proxy service (GPS) to interface with Grid services and applications, and the Grid Delegation service (GDS) to interface with network services to utilize network resources. In some cases, resource-based XML messaging can be employed for the GPAN proxy communication.

Grid proxy architecture for network resources from Tal Lavian Ph.D.

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0 Ultra low phase noise frequency synthesizer /slideshow/ultra-low-phase-noise-frequency-synthesizer-235849496/235849496 us9660655-200618140913
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.]]>
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.]]> Thu, 18 Jun 2020 14:09:13 GMT /slideshow/ultra-low-phase-noise-frequency-synthesizer-235849496/235849496 tlavian@slideshare.net(tlavian) Ultra low phase noise frequency synthesizer tlavian A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us9660655-200618140913-thumbnail.jpg?width=120&height=120&fit=bounds" /> A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.

Ultra low phase noise frequency synthesizer from Tal Lavian Ph.D.

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0 Systems and methods for electronic communications /slideshow/systems-and-methods-for-electronic-communications-235849407/235849407 us9690877-200618140621
Embodiments of the invention provide a system for enhancing user interaction with the Internet of Things. The system includes a processor, and a memory coupled to the processor. The memory includes a database having one or more options corresponding to each of the Internet of Things. The memory further includes instructions executable by the processor to share at least one of the one or more options with one or more users of the things. Further, the instructions receive information corresponding to selection of the at least one option by the one or more users. Additionally, the instructions update the database based on the selection of the at least one option by the one or more users. Further, a device for enhancing interaction with the things is also disclosed.]]>
Embodiments of the invention provide a system for enhancing user interaction with the Internet of Things. The system includes a processor, and a memory coupled to the processor. The memory includes a database having one or more options corresponding to each of the Internet of Things. The memory further includes instructions executable by the processor to share at least one of the one or more options with one or more users of the things. Further, the instructions receive information corresponding to selection of the at least one option by the one or more users. Additionally, the instructions update the database based on the selection of the at least one option by the one or more users. Further, a device for enhancing interaction with the things is also disclosed.]]> Thu, 18 Jun 2020 14:06:21 GMT /slideshow/systems-and-methods-for-electronic-communications-235849407/235849407 tlavian@slideshare.net(tlavian) Systems and methods for electronic communications tlavian Embodiments of the invention provide a system for enhancing user interaction with the Internet of Things. The system includes a processor, and a memory coupled to the processor. The memory includes a database having one or more options corresponding to each of the Internet of Things. The memory further includes instructions executable by the processor to share at least one of the one or more options with one or more users of the things. Further, the instructions receive information corresponding to selection of the at least one option by the one or more users. Additionally, the instructions update the database based on the selection of the at least one option by the one or more users. Further, a device for enhancing interaction with the things is also disclosed. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us9690877-200618140621-thumbnail.jpg?width=120&height=120&fit=bounds" /> Embodiments of the invention provide a system for enhancing user interaction with the Internet of Things. The system includes a processor, and a memory coupled to the processor. The memory includes a database having one or more options corresponding to each of the Internet of Things. The memory further includes instructions executable by the processor to share at least one of the one or more options with one or more users of the things. Further, the instructions receive information corresponding to selection of the at least one option by the one or more users. Additionally, the instructions update the database based on the selection of the at least one option by the one or more users. Further, a device for enhancing interaction with the things is also disclosed.

Systems and methods for electronic communications from Tal Lavian Ph.D.

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0 Ultra low phase noise frequency synthesizer /slideshow/ultra-low-phase-noise-frequency-synthesizer-235849348/235849348 us9705511-200618140445
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.]]>
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.]]> Thu, 18 Jun 2020 14:04:44 GMT /slideshow/ultra-low-phase-noise-frequency-synthesizer-235849348/235849348 tlavian@slideshare.net(tlavian) Ultra low phase noise frequency synthesizer tlavian A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us9705511-200618140445-thumbnail.jpg?width=120&height=120&fit=bounds" /> A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.

Ultra low phase noise frequency synthesizer from Tal Lavian Ph.D.

]]> 85 0 https://cdn.slidesharecdn.com/ss_thumbnails/us9705511-200618140445-thumbnail.jpg?width=120&height=120&fit=bounds document Black http://activitystrea.ms/schema/1.0/post

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0 Ultra low phase noise frequency synthesizer /tlavian/ultra-low-phase-noise-frequency-synthesizer-235849289 us9762251-200618140303
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.]]>
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.]]> Thu, 18 Jun 2020 14:03:03 GMT /tlavian/ultra-low-phase-noise-frequency-synthesizer-235849289 tlavian@slideshare.net(tlavian) Ultra low phase noise frequency synthesizer tlavian A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us9762251-200618140303-thumbnail.jpg?width=120&height=120&fit=bounds" /> A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.

Ultra low phase noise frequency synthesizer from Tal Lavian Ph.D.

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0 Radar target detection system for autonomous vehicles with ultra-low phase noise frequency synthesizer /slideshow/radar-target-detection-system-for-autonomous-vehicles-with-ultralow-phase-noise-frequency-synthesizer-235849208/235849208 us9831881-200618140046
An object detection system for autonomous vehicle, comprising a radar unit and at least one ultra-low phase noise frequency synthesizer, is provided. The radar unit configured for detecting the presence and characteristics of one or more objects in various directions. The radar unit may include a transmitter for transmitting at least one radio signal; and a receiver for receiving the at least one radio signal returned from the one or more objects. The ultra-low phase noise frequency synthesizer may utilize Clocking device, Sampling Reference PLL, at least one fixed frequency divider, DDS and main PLL to reduce phase noise from the returned radio signal. This proposed system overcomes deficiencies of current generation state of the art Radar Systems by providing much lower level of phase noise which would result in improved performance of the radar system in terms of target detection, characterization etc. Further, a method for autonomous vehicle is also disclosed.]]>
An object detection system for autonomous vehicle, comprising a radar unit and at least one ultra-low phase noise frequency synthesizer, is provided. The radar unit configured for detecting the presence and characteristics of one or more objects in various directions. The radar unit may include a transmitter for transmitting at least one radio signal; and a receiver for receiving the at least one radio signal returned from the one or more objects. The ultra-low phase noise frequency synthesizer may utilize Clocking device, Sampling Reference PLL, at least one fixed frequency divider, DDS and main PLL to reduce phase noise from the returned radio signal. This proposed system overcomes deficiencies of current generation state of the art Radar Systems by providing much lower level of phase noise which would result in improved performance of the radar system in terms of target detection, characterization etc. Further, a method for autonomous vehicle is also disclosed.]]> Thu, 18 Jun 2020 14:00:46 GMT /slideshow/radar-target-detection-system-for-autonomous-vehicles-with-ultralow-phase-noise-frequency-synthesizer-235849208/235849208 tlavian@slideshare.net(tlavian) Radar target detection system for autonomous vehicles with ultra-low phase noise frequency synthesizer tlavian An object detection system for autonomous vehicle, comprising a radar unit and at least one ultra-low phase noise frequency synthesizer, is provided. The radar unit configured for detecting the presence and characteristics of one or more objects in various directions. The radar unit may include a transmitter for transmitting at least one radio signal; and a receiver for receiving the at least one radio signal returned from the one or more objects. The ultra-low phase noise frequency synthesizer may utilize Clocking device, Sampling Reference PLL, at least one fixed frequency divider, DDS and main PLL to reduce phase noise from the returned radio signal. This proposed system overcomes deficiencies of current generation state of the art Radar Systems by providing much lower level of phase noise which would result in improved performance of the radar system in terms of target detection, characterization etc. Further, a method for autonomous vehicle is also disclosed. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us9831881-200618140046-thumbnail.jpg?width=120&height=120&fit=bounds" /> An object detection system for autonomous vehicle, comprising a radar unit and at least one ultra-low phase noise frequency synthesizer, is provided. The radar unit configured for detecting the presence and characteristics of one or more objects in various directions. The radar unit may include a transmitter for transmitting at least one radio signal; and a receiver for receiving the at least one radio signal returned from the one or more objects. The ultra-low phase noise frequency synthesizer may utilize Clocking device, Sampling Reference PLL, at least one fixed frequency divider, DDS and main PLL to reduce phase noise from the returned radio signal. This proposed system overcomes deficiencies of current generation state of the art Radar Systems by providing much lower level of phase noise which would result in improved performance of the radar system in terms of target detection, characterization etc. Further, a method for autonomous vehicle is also disclosed.

Radar target detection system for autonomous vehicles with ultra-low phase noise frequency synthesizer from Tal Lavian Ph.D.

]]> 96 0 https://cdn.slidesharecdn.com/ss_thumbnails/us9831881-200618140046-thumbnail.jpg?width=120&height=120&fit=bounds document Black http://activitystrea.ms/schema/1.0/post

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0 Grid proxy architecture for network resources /slideshow/grid-proxy-architecture-for-network-resources-235849164/235849164 us20150058490a1-200618135927
Various embodiments allow Grid applications to access resources shared in communication network domains. Grid Proxy Architecture for Network Resources (GPAN) bridges Grid services serving user applications and network services controlling network devices through proxy functions. At times, GPAN employs distributed network service peers (NSP) in network domains to discover, negotiate and allocate network resources for Grid applications. An elected master NSP is the unique Grid node that runs GPAN and represents the whole network to share network resources to Grids without Grid involvement of network devices. GPAN provides the Grid Proxy service (GPS) to interface with Grid services and applications, and the Grid Delegation service (GDS) to interface with network services to utilize network resources. In some cases, resource-based XML messaging can be employed for the GPAN proxy communication.]]>
Various embodiments allow Grid applications to access resources shared in communication network domains. Grid Proxy Architecture for Network Resources (GPAN) bridges Grid services serving user applications and network services controlling network devices through proxy functions. At times, GPAN employs distributed network service peers (NSP) in network domains to discover, negotiate and allocate network resources for Grid applications. An elected master NSP is the unique Grid node that runs GPAN and represents the whole network to share network resources to Grids without Grid involvement of network devices. GPAN provides the Grid Proxy service (GPS) to interface with Grid services and applications, and the Grid Delegation service (GDS) to interface with network services to utilize network resources. In some cases, resource-based XML messaging can be employed for the GPAN proxy communication.]]> Thu, 18 Jun 2020 13:59:27 GMT /slideshow/grid-proxy-architecture-for-network-resources-235849164/235849164 tlavian@slideshare.net(tlavian) Grid proxy architecture for network resources tlavian Various embodiments allow Grid applications to access resources shared in communication network domains. Grid Proxy Architecture for Network Resources (GPAN) bridges Grid services serving user applications and network services controlling network devices through proxy functions. At times, GPAN employs distributed network service peers (NSP) in network domains to discover, negotiate and allocate network resources for Grid applications. An elected master NSP is the unique Grid node that runs GPAN and represents the whole network to share network resources to Grids without Grid involvement of network devices. GPAN provides the Grid Proxy service (GPS) to interface with Grid services and applications, and the Grid Delegation service (GDS) to interface with network services to utilize network resources. In some cases, resource-based XML messaging can be employed for the GPAN proxy communication. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us20150058490a1-200618135927-thumbnail.jpg?width=120&height=120&fit=bounds" /> Various embodiments allow Grid applications to access resources shared in communication network domains. Grid Proxy Architecture for Network Resources (GPAN) bridges Grid services serving user applications and network services controlling network devices through proxy functions. At times, GPAN employs distributed network service peers (NSP) in network domains to discover, negotiate and allocate network resources for Grid applications. An elected master NSP is the unique Grid node that runs GPAN and represents the whole network to share network resources to Grids without Grid involvement of network devices. GPAN provides the Grid Proxy service (GPS) to interface with Grid services and applications, and the Grid Delegation service (GDS) to interface with network services to utilize network resources. In some cases, resource-based XML messaging can be employed for the GPAN proxy communication.

Grid proxy architecture for network resources from Tal Lavian Ph.D.

]]> 58 0 https://cdn.slidesharecdn.com/ss_thumbnails/us20150058490a1-200618135927-thumbnail.jpg?width=120&height=120&fit=bounds document Black http://activitystrea.ms/schema/1.0/post

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0 Method and apparatus for scheduling resources on a switched underlay network /slideshow/method-and-apparatus-for-scheduling-resources-on-a-switched-underlay-network-235824064/235824064 wo2005033899a2-200618044626
A method and apparatus for resource scheduling on a switched underlay network (18) enables coordination, scheduling, and scheduling optimization to take place taking into account the availability of the data and the network resources comprising the switched underlay network (18). Requested transfers may be fulfilled by assessing the requested transfer parameters, the availability of the network resources required to fulfill the request, the availability of the data to be transferred, the availability of sufficient storage resources to receive the data, and other potentially conflicting requested transfers. In one embodiment, the requests are under-constrained to enable transfer scheduling optimization to occur. The under-constrained nature of the requests enable transfer scheduling optimization to occur. The under-constrained nature of the requests enables requests to be scheduled taking into account factors such as transfer priority, transfer duration, the amount of time it has been since the transfer request was submitted, and many other factors.]]>
A method and apparatus for resource scheduling on a switched underlay network (18) enables coordination, scheduling, and scheduling optimization to take place taking into account the availability of the data and the network resources comprising the switched underlay network (18). Requested transfers may be fulfilled by assessing the requested transfer parameters, the availability of the network resources required to fulfill the request, the availability of the data to be transferred, the availability of sufficient storage resources to receive the data, and other potentially conflicting requested transfers. In one embodiment, the requests are under-constrained to enable transfer scheduling optimization to occur. The under-constrained nature of the requests enable transfer scheduling optimization to occur. The under-constrained nature of the requests enables requests to be scheduled taking into account factors such as transfer priority, transfer duration, the amount of time it has been since the transfer request was submitted, and many other factors.]]> Thu, 18 Jun 2020 04:46:26 GMT /slideshow/method-and-apparatus-for-scheduling-resources-on-a-switched-underlay-network-235824064/235824064 tlavian@slideshare.net(tlavian) Method and apparatus for scheduling resources on a switched underlay network tlavian A method and apparatus for resource scheduling on a switched underlay network (18) enables coordination, scheduling, and scheduling optimization to take place taking into account the availability of the data and the network resources comprising the switched underlay network (18). Requested transfers may be fulfilled by assessing the requested transfer parameters, the availability of the network resources required to fulfill the request, the availability of the data to be transferred, the availability of sufficient storage resources to receive the data, and other potentially conflicting requested transfers. In one embodiment, the requests are under-constrained to enable transfer scheduling optimization to occur. The under-constrained nature of the requests enable transfer scheduling optimization to occur. The under-constrained nature of the requests enables requests to be scheduled taking into account factors such as transfer priority, transfer duration, the amount of time it has been since the transfer request was submitted, and many other factors. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/wo2005033899a2-200618044626-thumbnail.jpg?width=120&height=120&fit=bounds" /> A method and apparatus for resource scheduling on a switched underlay network (18) enables coordination, scheduling, and scheduling optimization to take place taking into account the availability of the data and the network resources comprising the switched underlay network (18). Requested transfers may be fulfilled by assessing the requested transfer parameters, the availability of the network resources required to fulfill the request, the availability of the data to be transferred, the availability of sufficient storage resources to receive the data, and other potentially conflicting requested transfers. In one embodiment, the requests are under-constrained to enable transfer scheduling optimization to occur. The under-constrained nature of the requests enable transfer scheduling optimization to occur. The under-constrained nature of the requests enables requests to be scheduled taking into account factors such as transfer priority, transfer duration, the amount of time it has been since the transfer request was submitted, and many other factors.

Method and apparatus for scheduling resources on a switched underlay network from Tal Lavian Ph.D.

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0 Dynamic assignment of traffic classes to a priority queue in a packet forwarding device /slideshow/dynamic-assignment-of-traffic-classes-to-a-priority-queue-in-a-packet-forwarding-device-235823843/235823843 wo2000041368a2-200618044109
An apparatus and method for dynamic assignment of classes of traffic to a priority queue. Bandwidth consumption by one or more types of packet traffic received in the packet forwarding device is monitored to determine whether the bandwidth consumption exceeds a threshold. If the bandwidth consumption exceeds the threshold, assignment of at least one type of packet traffic of the one or more types of packet traffic is changed from a queue having a first priority to a queue having a second priority.]]>
An apparatus and method for dynamic assignment of classes of traffic to a priority queue. Bandwidth consumption by one or more types of packet traffic received in the packet forwarding device is monitored to determine whether the bandwidth consumption exceeds a threshold. If the bandwidth consumption exceeds the threshold, assignment of at least one type of packet traffic of the one or more types of packet traffic is changed from a queue having a first priority to a queue having a second priority.]]> Thu, 18 Jun 2020 04:41:09 GMT /slideshow/dynamic-assignment-of-traffic-classes-to-a-priority-queue-in-a-packet-forwarding-device-235823843/235823843 tlavian@slideshare.net(tlavian) Dynamic assignment of traffic classes to a priority queue in a packet forwarding device tlavian An apparatus and method for dynamic assignment of classes of traffic to a priority queue. Bandwidth consumption by one or more types of packet traffic received in the packet forwarding device is monitored to determine whether the bandwidth consumption exceeds a threshold. If the bandwidth consumption exceeds the threshold, assignment of at least one type of packet traffic of the one or more types of packet traffic is changed from a queue having a first priority to a queue having a second priority. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/wo2000041368a2-200618044109-thumbnail.jpg?width=120&height=120&fit=bounds" /> An apparatus and method for dynamic assignment of classes of traffic to a priority queue. Bandwidth consumption by one or more types of packet traffic received in the packet forwarding device is monitored to determine whether the bandwidth consumption exceeds a threshold. If the bandwidth consumption exceeds the threshold, assignment of at least one type of packet traffic of the one or more types of packet traffic is changed from a queue having a first priority to a queue having a second priority.

Dynamic assignment of traffic classes to a priority queue in a packet forwarding device from Tal Lavian Ph.D.

]]> 19 0 https://cdn.slidesharecdn.com/ss_thumbnails/wo2000041368a2-200618044109-thumbnail.jpg?width=120&height=120&fit=bounds document Black http://activitystrea.ms/schema/1.0/post

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0 Method and apparatus for using a command design pattern to access and configure network elements /slideshow/method-and-apparatus-for-using-a-command-design-pattern-to-access-and-configure-network-elements/235823768 us20140379784a1-200618043936
An XML accessible network device is capable of performing functions in response to an XML encoded request transmitted over a network. It includes a network data transfer service, coupled to a network, that is capable of receiving XML encoded requests from a client also connected to the network. A service engine is capable of understanding and parsing the XML encoded requests according to a corresponding DTD. The service engine further instantiates a service using parameters provided in the XML encoded request and launches the service for execution on the network device in accordance with a command design parameter. A set of device APIs interacts with hardware and software on the network device for executing the requested service on the network device. If necessary, a response is further collected from the device and provided to the client in a response message.]]>
An XML accessible network device is capable of performing functions in response to an XML encoded request transmitted over a network. It includes a network data transfer service, coupled to a network, that is capable of receiving XML encoded requests from a client also connected to the network. A service engine is capable of understanding and parsing the XML encoded requests according to a corresponding DTD. The service engine further instantiates a service using parameters provided in the XML encoded request and launches the service for execution on the network device in accordance with a command design parameter. A set of device APIs interacts with hardware and software on the network device for executing the requested service on the network device. If necessary, a response is further collected from the device and provided to the client in a response message.]]> Thu, 18 Jun 2020 04:39:36 GMT /slideshow/method-and-apparatus-for-using-a-command-design-pattern-to-access-and-configure-network-elements/235823768 tlavian@slideshare.net(tlavian) Method and apparatus for using a command design pattern to access and configure network elements tlavian An XML accessible network device is capable of performing functions in response to an XML encoded request transmitted over a network. It includes a network data transfer service, coupled to a network, that is capable of receiving XML encoded requests from a client also connected to the network. A service engine is capable of understanding and parsing the XML encoded requests according to a corresponding DTD. The service engine further instantiates a service using parameters provided in the XML encoded request and launches the service for execution on the network device in accordance with a command design parameter. A set of device APIs interacts with hardware and software on the network device for executing the requested service on the network device. If necessary, a response is further collected from the device and provided to the client in a response message. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us20140379784a1-200618043936-thumbnail.jpg?width=120&height=120&fit=bounds" /> An XML accessible network device is capable of performing functions in response to an XML encoded request transmitted over a network. It includes a network data transfer service, coupled to a network, that is capable of receiving XML encoded requests from a client also connected to the network. A service engine is capable of understanding and parsing the XML encoded requests according to a corresponding DTD. The service engine further instantiates a service using parameters provided in the XML encoded request and launches the service for execution on the network device in accordance with a command design parameter. A set of device APIs interacts with hardware and software on the network device for executing the requested service on the network device. If necessary, a response is further collected from the device and provided to the client in a response message.

Method and apparatus for using a command design pattern to access and configure network elements from Tal Lavian Ph.D.

]]> 23 0 https://cdn.slidesharecdn.com/ss_thumbnails/us20140379784a1-200618043936-thumbnail.jpg?width=120&height=120&fit=bounds document Black http://activitystrea.ms/schema/1.0/post

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0 Reliable rating system and method thereof /slideshow/reliable-rating-system-and-method-thereof/235823648 us20140156758a1-200618043733
Embodiments of the invention provide means to the users of the system to provide ratings and corresponding feedback for enhancing the genuineness in the ratings. The system includes a memory coupled to a processor. The memory includes one or more instructions executable by the processor to enable the users of the system to rate each other based on at least one of sharing, exchanging, and selling one of activity, service or product. The system may provide a mechanism to encourage genuineness in ratings provided by the users. Furthermore, the instructions facilitate the rating receivers to provide feedbacks corresponding to the received ratings. The feedback includes accepting or objecting to a particular rating. Moreover, the memory includes instructions executable by the processor to enable the system to determine genuineness of an objection raised by a rating receiver.]]>
Embodiments of the invention provide means to the users of the system to provide ratings and corresponding feedback for enhancing the genuineness in the ratings. The system includes a memory coupled to a processor. The memory includes one or more instructions executable by the processor to enable the users of the system to rate each other based on at least one of sharing, exchanging, and selling one of activity, service or product. The system may provide a mechanism to encourage genuineness in ratings provided by the users. Furthermore, the instructions facilitate the rating receivers to provide feedbacks corresponding to the received ratings. The feedback includes accepting or objecting to a particular rating. Moreover, the memory includes instructions executable by the processor to enable the system to determine genuineness of an objection raised by a rating receiver.]]> Thu, 18 Jun 2020 04:37:32 GMT /slideshow/reliable-rating-system-and-method-thereof/235823648 tlavian@slideshare.net(tlavian) Reliable rating system and method thereof tlavian Embodiments of the invention provide means to the users of the system to provide ratings and corresponding feedback for enhancing the genuineness in the ratings. The system includes a memory coupled to a processor. The memory includes one or more instructions executable by the processor to enable the users of the system to rate each other based on at least one of sharing, exchanging, and selling one of activity, service or product. The system may provide a mechanism to encourage genuineness in ratings provided by the users. Furthermore, the instructions facilitate the rating receivers to provide feedbacks corresponding to the received ratings. The feedback includes accepting or objecting to a particular rating. Moreover, the memory includes instructions executable by the processor to enable the system to determine genuineness of an objection raised by a rating receiver. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us20140156758a1-200618043733-thumbnail.jpg?width=120&height=120&fit=bounds" /> Embodiments of the invention provide means to the users of the system to provide ratings and corresponding feedback for enhancing the genuineness in the ratings. The system includes a memory coupled to a processor. The memory includes one or more instructions executable by the processor to enable the users of the system to rate each other based on at least one of sharing, exchanging, and selling one of activity, service or product. The system may provide a mechanism to encourage genuineness in ratings provided by the users. Furthermore, the instructions facilitate the rating receivers to provide feedbacks corresponding to the received ratings. The feedback includes accepting or objecting to a particular rating. Moreover, the memory includes instructions executable by the processor to enable the system to determine genuineness of an objection raised by a rating receiver.

Reliable rating system and method thereof from Tal Lavian Ph.D.

]]> 24 0 https://cdn.slidesharecdn.com/ss_thumbnails/us20140156758a1-200618043733-thumbnail.jpg?width=120&height=120&fit=bounds document Black http://activitystrea.ms/schema/1.0/post

http://activitystrea.ms/schema/1.0/posted

0 Time variant rating system and method thereof /tlavian/time-variant-rating-system-and-method-thereof us20140156556a1-200618043301
Embodiments of the present invention provide a system for enhancing reliability in computation of ratings provided by a user over a social network. The system comprises of a processor and a memory coupled to the processor. The memory further comprises a rater score database, a satisfaction database, a social network registration database, a user profile database, and a plurality of instruction executable by the processor. Said instructions in the memory are enabled to accept a message from at least one user wherein said message comprises a satisfaction score associated with at least one service provider and to retrieve a rater score associated with said at least one user from said rater score database. Further, the memory includes instructions in order to compute a new satisfaction score based on said rater score and said satisfaction score and update said satisfaction database to include said new satisfaction score. In a similar manner, the new satisfaction score can be computed based upon the information stored in the social network registration database and user profile database.]]>
Embodiments of the present invention provide a system for enhancing reliability in computation of ratings provided by a user over a social network. The system comprises of a processor and a memory coupled to the processor. The memory further comprises a rater score database, a satisfaction database, a social network registration database, a user profile database, and a plurality of instruction executable by the processor. Said instructions in the memory are enabled to accept a message from at least one user wherein said message comprises a satisfaction score associated with at least one service provider and to retrieve a rater score associated with said at least one user from said rater score database. Further, the memory includes instructions in order to compute a new satisfaction score based on said rater score and said satisfaction score and update said satisfaction database to include said new satisfaction score. In a similar manner, the new satisfaction score can be computed based upon the information stored in the social network registration database and user profile database.]]> Thu, 18 Jun 2020 04:33:01 GMT /tlavian/time-variant-rating-system-and-method-thereof tlavian@slideshare.net(tlavian) Time variant rating system and method thereof tlavian Embodiments of the present invention provide a system for enhancing reliability in computation of ratings provided by a user over a social network. The system comprises of a processor and a memory coupled to the processor. The memory further comprises a rater score database, a satisfaction database, a social network registration database, a user profile database, and a plurality of instruction executable by the processor. Said instructions in the memory are enabled to accept a message from at least one user wherein said message comprises a satisfaction score associated with at least one service provider and to retrieve a rater score associated with said at least one user from said rater score database. Further, the memory includes instructions in order to compute a new satisfaction score based on said rater score and said satisfaction score and update said satisfaction database to include said new satisfaction score. In a similar manner, the new satisfaction score can be computed based upon the information stored in the social network registration database and user profile database. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us20140156556a1-200618043301-thumbnail.jpg?width=120&height=120&fit=bounds" /> Embodiments of the present invention provide a system for enhancing reliability in computation of ratings provided by a user over a social network. The system comprises of a processor and a memory coupled to the processor. The memory further comprises a rater score database, a satisfaction database, a social network registration database, a user profile database, and a plurality of instruction executable by the processor. Said instructions in the memory are enabled to accept a message from at least one user wherein said message comprises a satisfaction score associated with at least one service provider and to retrieve a rater score associated with said at least one user from said rater score database. Further, the memory includes instructions in order to compute a new satisfaction score based on said rater score and said satisfaction score and update said satisfaction database to include said new satisfaction score. In a similar manner, the new satisfaction score can be computed based upon the information stored in the social network registration database and user profile database.

Time variant rating system and method thereof from Tal Lavian Ph.D.

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0 Systems and methods for visual presentation and selection of ivr menu /slideshow/systems-and-methods-for-visual-presentation-and-selection-of-ivr-menu-235785723/235785723 us20150010136a1-200617154806
Embodiments of the invention provide a system for generating an Interactive Voice Response (IVR) database, the system comprising a processor and a memory coupled to the processor. The memory comprising a list of telephone numbers associated with one or more destinations implementing IVR menus, wherein the one or more destinations are grouped based on a plurality of categories of the IVR menus. Further the memory includes instructions executable by said processor for automatically communicating with the one of more destinations, and receiving at least one customization record from said at least one destination to store in the IVR database.]]>
Embodiments of the invention provide a system for generating an Interactive Voice Response (IVR) database, the system comprising a processor and a memory coupled to the processor. The memory comprising a list of telephone numbers associated with one or more destinations implementing IVR menus, wherein the one or more destinations are grouped based on a plurality of categories of the IVR menus. Further the memory includes instructions executable by said processor for automatically communicating with the one of more destinations, and receiving at least one customization record from said at least one destination to store in the IVR database.]]> Wed, 17 Jun 2020 15:48:06 GMT /slideshow/systems-and-methods-for-visual-presentation-and-selection-of-ivr-menu-235785723/235785723 tlavian@slideshare.net(tlavian) Systems and methods for visual presentation and selection of ivr menu tlavian Embodiments of the invention provide a system for generating an Interactive Voice Response (IVR) database, the system comprising a processor and a memory coupled to the processor. The memory comprising a list of telephone numbers associated with one or more destinations implementing IVR menus, wherein the one or more destinations are grouped based on a plurality of categories of the IVR menus. Further the memory includes instructions executable by said processor for automatically communicating with the one of more destinations, and receiving at least one customization record from said at least one destination to store in the IVR database. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us20150010136a1-200617154806-thumbnail.jpg?width=120&height=120&fit=bounds" /> Embodiments of the invention provide a system for generating an Interactive Voice Response (IVR) database, the system comprising a processor and a memory coupled to the processor. The memory comprising a list of telephone numbers associated with one or more destinations implementing IVR menus, wherein the one or more destinations are grouped based on a plurality of categories of the IVR menus. Further the memory includes instructions executable by said processor for automatically communicating with the one of more destinations, and receiving at least one customization record from said at least one destination to store in the IVR database.

Systems and methods for visual presentation and selection of ivr menu from Tal Lavian Ph.D.

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0 Ultra low phase noise frequency synthesizer /tlavian/ultra-low-phase-noise-frequency-synthesizer-235785509 us20160373117a1-200617154341
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.]]>
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.]]> Wed, 17 Jun 2020 15:43:41 GMT /tlavian/ultra-low-phase-noise-frequency-synthesizer-235785509 tlavian@slideshare.net(tlavian) Ultra low phase noise frequency synthesizer tlavian A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us20160373117a1-200617154341-thumbnail.jpg?width=120&height=120&fit=bounds" /> A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.

Ultra low phase noise frequency synthesizer from Tal Lavian Ph.D.

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0 Ultra low phase noise frequency synthesizer /slideshow/ultra-low-phase-noise-frequency-synthesizer/235785425 us20170099057a1-200617154202
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.]]>
A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.]]> Wed, 17 Jun 2020 15:42:02 GMT /slideshow/ultra-low-phase-noise-frequency-synthesizer/235785425 tlavian@slideshare.net(tlavian) Ultra low phase noise frequency synthesizer tlavian A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/us20170099057a1-200617154202-thumbnail.jpg?width=120&height=120&fit=bounds" /> A system for providing ultra low phase noise frequency synthesizers using Fractional-N PLL (Phase Lock Loop), Sampling Reference PLL and DDS (Direct Digital Synthesizer). Modern day advanced communication systems comprise frequency synthesizers that provide a frequency output signal to other parts of the transmitter and receiver so as to enable the system to operate at the set frequency band. The performance of the frequency synthesizer determines the performance of the communication link. Current days advanced communication systems comprises single loop Frequency synthesizers which are not completely able to provide lower phase deviations for errors (For 256 QAM the practical phase deviation for no errors is 0.4-0.5°) which would enable users to receive high data rate. This proposed system overcomes deficiencies of current generation state of the art communication systems by providing much lower level of phase deviation error which would result in much higher modulation schemes and high data rate.

Ultra low phase noise frequency synthesizer from Tal Lavian Ph.D.

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0 https://cdn.slidesharecdn.com/profile-photo-tlavian-48x48.jpg?cb=1592545761 Dr. Lavian is a scientist, technologist, and lecturer at UC Berkeley Engineering with over 25 years of experience. He specializes in telecommunications, network communications, and Internet protocols, including mobile devices, smartphones, wireless LAN (WLAN), routing, LAN/WAN, Ethernet, TCP/IP, UDP, IP, VoIP, web, and streaming media. Dr. Lavian has invented over 120 patents, over 60 of which he has prosecuted himself in front of the USPTO. Https://telecommnet.com TelecommNet.com https://cdn.slidesharecdn.com/ss_thumbnails/wo2016203460a2-200618142042-thumbnail.jpg?width=320&height=320&fit=bounds slideshow/ultra-low-phase-noise-frequency-synthesizer-235849953/235849953 Ultra low phase noise ... https://cdn.slidesharecdn.com/ss_thumbnails/ca2989752a1-200618141751-thumbnail.jpg?width=320&height=320&fit=bounds tlavian/ultra-low-phase-noise-frequency-synthesizer-235849819 Ultra low phase noise ... https://cdn.slidesharecdn.com/ss_thumbnails/us9021130-200618141546-thumbnail.jpg?width=320&height=320&fit=bounds slideshow/photonic-line-sharing-for-highspeed-routers/235849736 Photonic line sharing ...