 Ph.D Research Worker(Image Processing)
Building new image enhancement technique without hurting the image feature and providing expected image enhancement result, implementing new designed algorithm in FPGA platform.
 Verilog and FPGA
Studied Hardware Descriptions Language (Verilog) and simulate the design, generating test bench, viewing the waveform with modelsim. Implementing histogram equalization, image negative algorithm in FPGA platform.
 .Master in Electronics(Achieved with O grade)
Analog IC’s, Digital IC’s, Computer Organization, Signals and systems, Analog and Digital Communications, Electro Magnetic theory, Control Systems, Microprocessors(8086), Data Structures ...