Sudhanshu Janwadkar
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Surat India
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Sardar Vallabhbhai National Institute of Technology
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vlsi
8051
digital vlsi design
microcontrollers
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nmos
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vliw; processors; parallelism; computing; instruct
if else
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loops in vhdl
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datapath; control path; vlsi
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atpg
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aircraft
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wait statement in vhdl
polysilicon
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bulk cmos
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drain induced barrier lowering
fabrication of soi
floating body effect
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limitations of cmos
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eprom
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interrupts in 8051
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lcd
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lcd interfacing
interacing program
spi
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applications of i2c protocol
serial protocol
start bit
i2c frame format
i2c timing diagram
i2c master slave
address frame
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serial data line
serial clock line
sda
scl
spi protocol
spi bus
serial peripheral interface
master slave communication
miso
mosi
sclk
advantages of spi
limitations of spi
applications of spi
uart
asics
hamming code
convolutional code
computer network
low density parity code
odd parity
reed-solomon code
error control coding
information security
information theory and coding
cyclic redundancy check
internet check sum
fletcher checksum
redundant bits
network security
osi model
tcp/ip protocol
datalink layer
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data communication
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network interface card
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acknowledgement
forouzan ppt
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interacing code
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fpga vs asic
digital vlsi
basics of fpga
introduction to fpga
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digital design flow
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vlsi layouts
keypad interfacing
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devices and circuits
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boolean expression
cmos inverter
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asic testing
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journal
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masters thesis
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clock cycle
crystal frequency
crystal in microcontroller
instruction cycle
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microocontroller
pin description of 8051
port architecture
port latches
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reset in 8051
c programming
ascii to bcd for 8051
code conversion in 8051
serial transfer in 8051
ports in 8051
hex file
datatypes in embedded c
sfr
timer
counter
tmod tcon
register format
timers in 8051
¾±Â²³¦
position accuracy error
mos switch
p-channel mosfet
pull-down network
pull-up network
transmission gate
instructions
single purpose processor
application specific processor
general purpose processors
8 bit microcontrollers
design metrics
nre cost
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harward architecture
von neuman architecture
cisco
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register bank
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ram
block diagram
special function register
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