1. UNIT 3 Syllabus
Architecture of 8051
Special Function Registers(SFRs)
I/O Pins Ports and Circuits {Pin Diagram}
Instruction set
Addressing modes
Assembly language programming
1
2. 8051 Family
The 8051 is a subset of the 8052
The 8031 is a ROM-less 8051
Add external ROM to it
You lose two ports, and leave only 2 ports for I/O operations
2
6. 8051 Features
8 bit CPU
On-chip clock oscillator
4K bytes of on-chip Program Memory-ROM
128 bytes of on-chip Data RAM
64KB Program Memory address space
64KB Data Memory address space
32 bidirectional I/0 lines (Port 0,1,2,3)
Port 0 { P0.0-P0.7 } 8 pins
Port 1 { P1.0-P1.7 } 8 pins
Port 2 { P2.0-P2.7 } 8 pins
Port 3 { P3.0-P3.7 } 8 pins
6
7. Two 16-bit timer/counters(Timer 1,Timer 0)
One serial port
UART(Universal Asynchronous Receiver Transmitter)
6-source interrupt structure
1. External interrupt INT0
2. Timer interrupt T0
3. External interrupt INT1
4. Timer interrupt T1
5. Serial communication interrupt
6. Timer Interrupt T2
4 Register Banks (Bank 0, Bank 1, Bank 2, Bank 3)
each bank has R0-R7 registers
7
10. EA/VPP
EA, external access
EA = 0, 8051 microcontroller access from
external program memory (ROM) only.
EA = 1, then it access internal and external
program memories (ROMS).
10
11. I/O Port Pins
The four 8-bit I/O ports
Port 0 { P0.0-P0.7 } 8 pins
Port 1 { P1.0-P1.7 } 8 pins
Port 2 { P2.0-P2.7 } 8 pins
Port 3 { P3.0-P3.7 } 8 pins
11
12. Port 3
Port 3 can be used as input or output.
Port 3 has the additional function of
providing some extremely important
signals
12
13. Pin Description Summary
PIN TYPE NAME AND FUNCTION
Vss I Ground: 0 V reference.
Vcc I Power Supply + 5V.
P0.0 - P0.7
I/O Port 0: Port 0 is also the multiplexed low-order address and
data bus during accesses to external program and data
memory.
P1.0 - P1.7
I/O Port 1: Port 1 is an 8-bit bi-directional simple I/O port.
P2.0 - P2.7
I/O Port 2: Port 2 is an 8-bit bidirectional I/O. Port 2 emits the
high order address byte
P3.0 - P3.7
I/O Port 3: Port 3 is an 8 bit bidirectional I/O port. Port 3 also
serves special features as explained.
13
14. Pin Description Summary
PIN TYPE NAME AND FUNCTION
RST I Reset: resets the device.
ALE O Address Latch Enable:
When ALE=0, it provides data D0-D7
When ALE=1, it has address A0-A7
PSEN* O Program Store Enable:
For External Code Memory, PSEN = 0
For External Data Memory, PSEN = 1
EA*/VPP I External Access Enable/Programming Supply Voltage:
EA = 0, 8051 microcontroller access from external program
memory (ROM) only.
EA = 1, then it access internal and external program
memories (ROMS).
14
18. Program Counter(PC) : The program counter
always points to the address of the next instruction to
be executed.
Stack Pointer Register (SP) : It is an 8-bit register
which stores the address of the stack top.
ALU: perform arithmetic & logical operations
Flags : Carry(C),Auxiliary Carry(AC),
Overflow(O) & Parity(P)
18
19. Timing & Control: Timing and control unit
synchronises all microcontroller operations with clock
& generates control signals.
DPTR: (Data Pointer) - 16 bit
DPH-Data Pointer High 8 bit
DPL-Data Pointer Low 8 bit
DPTR Register is usually used for storing data and
intermediate results.
19
23. A Register (Accumulator)
B Register
Program Status Word (PSW) Register
Data Pointer Register (DPTR)
DPH (Data Pointer High) , DPL(Data Pointer Low)
Stack Pointer (SP) Register
P0, P1, P2, P3 - Input/output port Registers
Timer T0 - TH0 & TL0
Timer T1 TH1 & TL1
Timer Control (TCON) Register
Serial Port Control (SCON) Register
Serial Buffer Control (SBUF) Register
IP Register (Interrupt Priority)
IE Register (Interrupt Enable)
23
24. 8051 Register Bank Structure
4 MEMORY BANKS
Bank 0
R0 R1 R2 R3 R4 R5 R6 R7
Bank 3
R0 R1 R2 R3 R4 R5 R6 R7
Bank 2
R0 R1 R2 R3 R4 R5 R6 R7
Bank 1
R0 R1 R2 R3 R4 R5 R6 R7
24
25. Program Status Word [PSW]
C AC F0 RS1 RS0 OV F1 P
Register Bank Select
Carry
Auxiliary Carry
User Flag 0
Parity
User Flag 1
Overflow
25
00-Bank 0
01-Bank 1
10-Bank 2
11-Bank 3
26. Data Pointer Register (DPTR)
It consists of two separate registers:
DPH (Data Pointer High) &
DPL (Data Pointer Low).
26
27. Stack Pointer (SP) Register
27
P0, P1, P2, P3 Input / Output Registers
8 bit
8 bit
8 bit
8 bit
8 bit
29. INTERRUPTS
An interrupt is an external or internal event that interrupts the
microcontroller to inform it that a device needs its service
A single microcontroller can serve several devices by two ways:
1. Interrupt
2. Polling
29
30. Interrupt
Upon receiving an interrupt signal, the
microcontroller interrupts whatever it is doing
and serves the device.
The program which is associated with the
interrupt is called the interrupt service routine
(ISR) .
30
31. Steps in Executing an Interrupt
1. It finishes the instruction it is executing and saves the address of
the next instruction (PC) on the stack.
2. It also saves the current status of all the interrupts internally (i.e:
not on the stack).
3. It jumps to a fixed location in memory, called the interrupt vector
table, that holds the address of the ISR.
4. The microcontroller gets the address of the ISR from the
interrupt vector table and jumps to it.
5. It starts to execute the interrupt service subroutine until it
reaches the last instruction of the subroutine which is RETI
(return from interrupt).
6. Upon executing the RETI instruction, the microcontroller returns
to the place where it was interrupted.
31
32. Steps in executing an interrupt
Finish current instruction and saves the PC on stack.
Jumps to a fixed location in memory depend on type
of interrupt
Starts to execute the interrupt service routine until
RETI (return from interrupt)
Upon executing the RETI the microcontroller returns
to the place where it was interrupted. Get pop PC
from stack
33. Interrupt Sources
Original 8051 has 6 sources of interrupts
Reset (RST)
Timer 0 overflow (TF0)
Timer 1 overflow (TF1)
External Interrupt 0 (INT0)
External Interrupt 1 (INT1)
Serial Port events (RI+TI)
{Reception/Transmission of Serial Character}
35. 8051 Interrupt related Registers
The various registers associated with the use of
interrupts are:
TCON - Edge and Type bits for External Interrupts 0/1
SCON - RI and TI interrupt flags for RS232 {SERIAL
COMMUNICATION}
IE - interrupt Enable
IP - Interrupts priority
35
36. Enabling and Disabling an Interrupt
The register called IE (interrupt enable) that is
responsible for enabling (unmasking) and disabling
(masking) the interrupts.
36
37. Interrupt Enable (IE) Register
EA : Global enable/disable.
--- : Reserved for additional interrupt hardware.
ES : Enable Serial port interrupt.
ET1 : Enable Timer 1 control bit.
EX1 : Enable External 1 interrupt.
ET0 : Enable Timer 0 control bit.
EX0 : Enable External 0 interrupt.
MOV IE,#08h
or
SETB ET1
--
37