Personal Information
Organization / Workplace
Phoenix, Arizona Area United States
Occupation
Actively seeking full time employment starting October 2015 in the domain of Circuit/Physical Design and Verification
Industry
Electronics / Computer Hardware
About
Seeking full time opportunities starting July 2015 in the field of ASIC/Physical/RTL Design and Verification where my technical proficiency, strategic thinking will add value to the Organization.
Specialties:
- Front-end Design & Verification
- Back-end Design & Physical Verification
- RTL to GDS Flow: Synthesis, APR, Pre-CTS & Post-CTS optimization, Nano-route, Post-route
optimizations, Static Timing Analysis using Synopsys Nanotime & Primetime.
- Custom Memory Design : SRAM, Cache, Register File.
Technical Skills:
- Design & Layout Tools (EDA): Cadence 5 (Virtuoso & Spectre), Cadence 6 (in synopsys 32nm
PDK), StarRC extractor, Hercules DRC LVS
- Simulation: Hspice, Spectre, Altera Mod...
Contact Details