I am an Electrical Engineer with a Master's degree from Rochester Institute of Technology and specialization in Digital System Design. I am currently seeking a Full Time position.
I am interested in field of RTL Design, ASIC Design, FPGA Design, Physical Design and Computer Architecture.
My experience involve RISC processor design, memory Interface and controller design, full custom RTL design using Verilog & VHDL and its verification and synthesis. I have also worked on gate level design and full custom layout, both manual and auto-layout using place & route technique. I have experience with developing complex testbenches using SystemVerilog & OVM/UVM.
My Skills are:
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