1. More than 4 years experience in RTL functional verification using Verilog, SystemVerilog language and UVM, OVM methodologies.
2. More than a year of good understanding and working experience in processor based full chip functional verification.
3. Worked on communication Protocols such as Ethernet MAC, USB PHY, Serial Synchronous Protocols (SPI), I2S, I2C and AMBA Protocols (AXI, AHB, and APB).
4. In-depth understanding of importance of different levels of verification (unit, sub system, system levels, GLS, Mixed-Mode(SV-VAMS), Mixed-Signal verification(SV-VAMS/SPICE)).
5. Involved in developing UVM based environments building from the scratch, creating verification plans/Test Plans, ...
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