Graduated in Computer Engineering from the Federal University of Itajub谩 - UNIFEI and MA from University of Sao Paulo. Has done the course for digital designer of integrated circuits, certified by Cadence. Was digital designer for 3 years (2010-2012) in the Design House LSITEC, acting in the frontend (verilog) and backend flows for the development of several IC's. Have a good experience with design implementation in FPGA. Worked with memory assembly process (Packaging).
In addition, have interest in embedded systems.
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