Personal Information
Organization / Workplace
San Francisco Bay Area United States
Occupation
Standard Cell Design Intern at Nangate
About
-Masters in Digital Systems, Electrical Engineering at The University of Texas at Dallas
-Actively seeking full time opportunity in the fields of Digital IC/Hardware/Physical Design where my skills can be utilized and enhanced.
Technical exposure:
Scripting languages: Perl
Programming languages:C, C++
Assembly level Programming:
HDL: Verilog, VHDL
IDE: Code Composer Studio
Synthesis tools: Xilinx, Design Compiler
Layout tools: Cadence Virtuoso
Place & Route tool: Cadence Encounter
Static timing analysis: Primetime
Simulation tool: Modelsim, HSPICE, Waveview
Operating System: Windows, Unix
Contact Details
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