狠狠撸

Noida Area, India India

RTL DESIGN / VERIFICATION ENGINEER

Electronics / Computer Hardware

VLSI Domain Skills:- HDLs: Verilog and VHDL. HVL: System Verilog. Scripting Language: Shell. Verification Methodologies: Coverage Driven Verification. TB Methodology: VMM. EDA Tool: Xilinx ISE and Modelsim. Domain: ASIC/FPGA Design Flow. Digital Design & Verification methodologies. Knowledge: RTL Coding, FSM based design, Simulation,STA. Code Coverage, Functional Coverage.