際際滷

際際滷Share a Scribd company logo

Counters

Download as PPTX, PDF
P
Phanikumar Gonugunta

This document discusses the design and simulation of counters in Cadence. It begins by describing the applications of counters such as timers, frequency counting, and finite state machines. It then discusses different types of counters like asynchronous/ripple counters and synchronous counters. The document presents the design and simulation of an asynchronous 4-bit Johnson counter and an asynchronous 4-bit up counter in Cadence. It provides the schematic diagrams, simulation waveforms, power consumption, delay characteristics, and maximum operating frequencies for each counter.

1 of 29
Downloaded 27 times
Counters design in Cadence By Gonugunta saiphani kumar Roll num:1421908 M.tech VLSI 2nd sem NIT jalandhar 1
Counters The major work of counter is counting of time / frequency electronic pulse Applications: Alarm clock Set an AC/TV timer Set a timer for taking picture Flashing indicator lights of your vehicle Counting the time allotted for a "process" The finite state machines In various ADC Communication (serial to parallel ,parallel to serial) 2
Real time applications Shipment quantities are counted to control the conveyor line flow. 3
Incoming and outgoing cars are counted to switch the FULL and VACANT signs. 4
Rotary encoder signals are counted to control a valve aperture. 5
Teamed up with a rotary encoder, the counter is used to control the cutting length of pipes. 6
Labeled cans alone are counted up. Rejected cans are not counted. 7
Medicine tablets are packed in specified quantities. 8
Printed matter is counted to package a specified number of copies. 9
Extra leader sheet that is now wound is counted by a rotary encoder and a color detecting sensor. 10
Incoming and outgoing parts are counted to keep parts feeders well-stocked. 11
Types of counters Asynchronous/Ripple counters: counter that is formed from n cascaded flip-flops. The clock input to each of the individual flip-flops, with the exception of the first, is taken from the output of the preceding one. Ex: Binary up counter, Binary down counter, Binary up/down counter, Mod-N counter, BCD counter(Mod-10) synchronous counters: A counter consisting of an interconnected series of flip-flops in which all the flip-flop outputs change state at the same instant, normally on application of a pulse at the counter input Ex: Binary up counter, Binary down counter, Binary up/down counter, Mod-N counter, BCD counter(Mod-10), Ring counter, Johnson counter, Binary presettable counter 12
Asynchronous Johnson counter 13
Positive edge triggered D-FF 14
Cadence schematic diagram 15
Cadence simulation 16
Power consumption 17
Properties of Johnson counter Simulator--Cadence Technology--180nm W/L of pmos = 600nm/180nm W/L of nmos = 240nm/180nm No. of transistors = 104 Clock range 1.8v - 0v Clock ON time =10nnm Clock time period = 25nm Rise & fall time = 1fs VDD = 1.8V GND = 0v 18
Results of Johnson counter Avg.Power consumption = 6.10亮w High to low delay (at every stage) = 219.5ps Low to high delay(at every stage) = 136ps Max. frequency of operation = 7.35 Ghz 19
Asynchronous up counter 20
Negative edge triggered j-k FF 21
Cadence schematic 22
Cadence simulation 23
Delay at each stage 24
Power consumption 25
Properties of up counter Simulator--Cadence Technology--180nm W/L of pmos = 600nm/180nm W/L of nmos = 240nm/180nm No. of transistors = 152 Clock range 1.8v - 0v Clock ON time =10nnm Clock time period = 20nm Rise & fall time = 1fs VDD = 1.8V GND = 0v 26
Results of up counter Avg. power consumption = 11.3亮w Delay at first stage = 176.1ps Delay at second stage = 467.5ps Delay at third stage = 762.1ps Delay at fourth stage = 1.025ns Max. frequency of operation = 5.67Ghz 27
References www.wikipedia.org/counters. http://wearcam.org/lectureflipflop. http://smartsim.org.uk/examples projects. www3.panasonic.biz /applications of counters 28
29

More Related Content

Counters