![Complements
Digital Logic Design Ch1-25
Radix Complement
Example: Base-10
Example: Base-2
The r's complement of an n-digit number N in base r is defined as
rn N for N 0 and as 0 for N = 0. Comparing with the (r 1) 's
complement, we note that the r's complement is obtained by adding 1
to the (r 1) 's complement, since rn N = [(rn 1) N] + 1.
The 10's complement of 012398 is 987602
The 10's complement of 246700 is 753300
The 2's complement of 1101100 is 0010100
The 2's complement of 0110111 is 1001001](https://image.slidesharecdn.com/digital-systems-and-binary-numbers1-230110162804-1ce0609c/85/digital-systems-and-binary-numbers1-pptx-25-320.jpg)
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- 1. Chapter 1 Digital Systems and Binary Numbers Digital Logic Design Ch1-1 Mustafa Kemal Uygurolu Digital Logic Design I
- 2. Outline of Chapter 1 Digital Logic Design Ch1-2 1.1 Digital Systems 1.2 Binary Numbers 1.3 Number-base Conversions 1.4 Octal and Hexadecimal Numbers 1.5 Complements 1.6 Signed Binary Numbers 1.7 Binary Codes 1.8 Binary Storage and Registers 1.9 Binary Logic
- 3. Digital Systems and Binary Numbers Digital Logic Design Ch1-3 Digital age and information age Digital computers General purposes Many scientific, industrial and commercial applications Digital systems Telephone switching exchanges Digital camera Electronic calculators, PDA's Digital TV Discrete information-processing systems Manipulate discrete elements of information For example, {1, 2, 3, } and {A, B, C, }
- 4. Analog and Digital Signal Analog system The physical quantities or signals may vary continuously over a specified range. Digital system The physical quantities or signals can assume only discrete values. Greater accuracy X(t) X(t) t t Digital Logic Design Ch1-4 Analog signal Digital signal
- 5. Binary Digital Signal An information variable represented by physical quantity. For digital systems, the variable takes on discrete values. Two level, or binary values are the most prevalent values. Binary values are represented abstractly by: Digits 0 and 1 Words (symbols) False (F) and True (T) Words (symbols) Low (L) and High (H) And words On and Off Binary values are represented by values or ranges of values of physical quantities. t Binary digital signal Digital Logic Design Ch1-5 V(t) Logic 1 undefine Logic 0
- 6. Decimal Number System Base (also called radix) = 10 10 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 } Digit Position Integer & fraction Digit Weight Weight = (Base) Position Magnitude Sum of Digit x Weight Formal Notation 2 1 0 -1 -2 5 1 2 7 4 100 10 1 0.1 0.01 500 10 2 0.7 0.04 d 2 1 0 -1 -2 2*B +d1*B +d0*B +d-1*B +d-2*B (512.74)10 Digital Logic Design Ch1-6
- 7. Octal Number System Base = 8 8 digits { 0, 1, 2, 3, 4, 5, 6, 7 } Weights Weight = (Base) Position Magnitude Sum of Digit x Weight Formal Notation 2 1 0 -1 -2 Digital Logic Design Ch1-7 64 8 1 1/8 1/64 5 1 2 7 4 5 *82 +1 *81 +2 *80 +7 *8-1 +4 *8- 2 =(330.9375)10 (512.74)8
- 8. Binary Number System Base = 2 2 digits { 0, 1 }, called binary digits or bits Weights Weight = (Base) Position Magnitude Sum of Bit x Weight Formal Notation Groups of bits 4 bits = Nibble 8 bits = Byte 2 1 0 -1 -2 Digital Logic Design Ch1-8 4 2 1 1/2 1/4 1 0 1 0 1 1 *22 +0 *21 +1 *20 +0 *2-1 +1 *2- 2 =(5.25)10 (101.01)2 1 0 1 1 1 1 0 0 0 1 0 1
- 9. Hexadecimal Number System Base = 16 16 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F } Weights Weight = (Base) Position Magnitude Sum of Digit x Weight Formal Notation 256 16 1 Digital Logic Design Ch1-9 1/16 1/256 1 E 5 7 A 2 1 0 -1 -2 1 *162 +14 *161 +5 *160 +7 *16-1 +10 *16-2 =(485.4765625)10 (1E5.7A)16
- 10. The Power of 2 n 2n 0 20=1 1 21=2 2 22=4 3 23=8 4 24=16 5 25=32 6 26=64 7 27=128 n 2n 8 28=256 9 29=512 10 210=1024 11 211=2048 12 212=4096 20 220=1M 30 230=1G 40 240=1T Mega Giga Tera Kilo Digital Logic Design Ch1-10
- 11. Addition Decimal Addition 1 1 5 5 + 5 5 1 1 0 = Ten Base Subtract a Base Carry Digital Logic Design Ch1-11
- 12. Binary Addition Column Addition (2)10 Digital Logic Design Ch1-12 1 1 1 1 1 1 1 1 1 1 0 1 = 61 + 1 0 1 1 1 = 23 1 0 1 0 1 0 0 = 84
- 13. Binary Subtraction Borrow a Base when needed 1 2 = (10)2 0 2 2 0 0 2 1 0 0 1 1 0 1 = 77 1 0 1 1 1 = 23 0 1 1 0 1 1 0 = 54 Digital Logic Design Ch1-13
- 14. Binary Multiplication Bit by bit 1 0 1 1 1 x 1 0 1 0 0 0 0 0 0 1 0 1 1 1 0 0 0 0 0 1 0 1 1 1 1 1 1 0 0 1 1 0 Digital Logic Design Ch1-14
- 15. Number Base Conversions Decimal (Base 10) Binary (Base 2) Evaluate Magnitude Octal (Base 8) Evaluate Magnitude Hexadecimal (Base 16) Evaluate Magnitude Digital Logic Design Ch1-15
- 16. Decimal (Integer) to Binary Conversion Divide the number by the Base (=2) Take the remainder (either 0 or 1) as a coefficient Take the quotient and repeat the division Example: (13)10 Quotient Remainder Coefficient 13/ 2 = 6 1 a0 = 1 6 / 2 = 3 0 a1 = 0 3 / 2 = 1 1 a2 = 1 1 / 2 = 0 Answer: 1 a3 = 1 (13)10 = (a3 a2 a1 a0)2 = (1101)2 MSB LSB Digital Logic Design Ch1-16
- 17. Decimal (Fraction) to Binary Conversion Multiply the number by the Base (=2) Take the integer (either 0 or 1) as a coefficient Take the resultant fraction and repeat the division Example: (0.625)10 Integer Fraction Coefficient 0.625 * 2 = 1 . 25 a-1 = 1 0.25 * 2 = 0 . 5 a-2 = 0 0.5 * 2 = 1 . 0 a-3 = 1 Answer: (0.625)10 = (0.a-1 a-2 a-3)2 = (0.101)2 MSB LSB Digital Logic Design Ch1-17
- 18. Decimal to Octal Conversion Example: (175)10 Quotient 175 / 8 = 21 Remainder 7 Coefficient a0 = 7 Answer: (175)10 = (a2 a1 a0)8 = (257)8 21 / 8 = 2 5 a1 = 5 2 / 8 = 0 2 a2 = 2 Example: (0.3125)10 Digital Logic Design Ch1-18 Integer Fraction 2 . 5 4 . 0 Coefficient a-1 = 2 a-2 = 4 Answer: (0.3125)10 = (0.a-1 a-2 a-3)8 = (0.24)8 0.3125 * 8 = 0.5 * 8 =
- 19. Binary Octal Conversion 8 = 23 Each group of 3 bits represents an octal digit Octal Binary 0 0 0 0 1 0 0 1 2 0 1 0 3 0 1 1 4 1 0 0 5 1 0 1 6 1 1 0 7 1 1 1 Example: ( 1 0 1 1 0 . 0 1 )2 ( 2 6 . 2 )8 Works both ways (Binary to Octal & Octal to Binary) Assume Zeros Digital Logic Design Ch1-19
- 20. Binary Hexadecimal Conversion 16 = 24 Each group of 4 bits represents a hexadecimal digit Hex Binary 0 0 0 0 0 1 0 0 0 1 2 0 0 1 0 3 0 0 1 1 4 0 1 0 0 5 0 1 0 1 6 0 1 1 0 7 0 1 1 1 8 1 0 0 0 9 1 0 0 1 A 1 0 1 0 B 1 0 1 1 C 1 1 0 0 D 1 1 0 1 E 1 1 1 0 F 1 1 1 1 Example: ( 1 0 1 1 0 . 0 1 )2 ( 1 6 . 4 )16 Assume Zeros Digital Logic Design Ch1-20 Works both ways (Binary to Hex & Hex to Binary)
- 21. Octal Hexadecimal Conversion Convert to Binary as an intermediate step Example: ( 2 6 . 2 )8 ( 0 1 0 1 1 0 . 0 1 0 )2 ( 1 6 . 4 )16 Assume Zeros Works both ways (Octal to Hex & Hex to Octal) Assume Zeros Digital Logic Design Ch1-21
- 22. Decimal, Binary, Octal and Hexadecimal Decimal Binary Octal Hex 00 0000 00 0 01 0001 01 1 02 0010 02 2 03 0011 03 3 04 0100 04 4 05 0101 05 5 06 0110 06 6 07 0111 07 7 08 1000 10 8 09 1001 11 9 10 1010 12 A 11 1011 13 B 12 1100 14 C 13 1101 15 D 14 1110 16 E 15 1111 17 F Digital Logic Design Ch1-22
- 23. Digital Logic Design Ch1-23 1.5 Complements There are two types of complements for each base-r system: the radix complement and diminished radix complement. Diminished Radix Complement - (r-1)s Complement Given a number N in base r having n digits, the (r1)s complement of N is defined as: (rn 1) N Example for 6-digit decimal numbers: 9s complement is (rn 1)N = (1061)N = 999999N 9s complement of 546700 is 999999546700 = 453299 Example for 7-digit binary numbers: 1s complement is (rn 1) N = (271)N = 1111111N 1s complement of 1011000 is 11111111011000 = 0100111 Observation: Subtraction from (rn 1) will never require a borrow Diminished radix complement can be computed digit-by-digit For binary: 1 0 = 1 and 1 1 = 0
- 24. Complements 1s Complement (Diminished Radix Complement) All 0s become 1s All 1s become 0s Example (10110000)2 (01001111)2 If you add a number and its 1s complement 1 0 1 1 0 0 0 0 + 0 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 Digital Logic Design Ch1-24
- 25. Complements Digital Logic Design Ch1-25 Radix Complement Example: Base-10 Example: Base-2 The r's complement of an n-digit number N in base r is defined as rn N for N 0 and as 0 for N = 0. Comparing with the (r 1) 's complement, we note that the r's complement is obtained by adding 1 to the (r 1) 's complement, since rn N = [(rn 1) N] + 1. The 10's complement of 012398 is 987602 The 10's complement of 246700 is 753300 The 2's complement of 1101100 is 0010100 The 2's complement of 0110111 is 1001001
- 26. Complements 2s Complement (Radix Complement) Take 1s complement then add 1 Toggle all bits to the left of the first 1 from the right Example: Number: 1s Comp.: 1 0 1 1 0 0 0 0 1 0 1 1 0 0 0 0 0 1 0 0 1 1 1 1 + 1 0 1 0 1 0 0 0 0 0 1 0 1 0 0 0 0 Digital Logic Design Ch1-26 OR
- 27. Complements Subtraction with Complements The subtraction of two n-digit unsigned numbers M N in base r can be done as follows: Digital Logic Design Ch1-27
- 28. Complements Example 1.5 Using 10's complement, subtract 72532 3250. Example 1.6 Using 10's complement, subtract 3250 72532. There is no end carry. Therefore, the answer is (10's complement of 30718) = 69282. Digital Logic Design Ch1-28
- 29. Complements Example 1.7 Given the two binary numbers X = 1010100 and Y = 1000011, perform the subtraction (a) X Y ; and (b) Y X, by using 2's complement. There is no end carry. Therefore, the answer is Y X = (2's complement of 1101111) = 0010001. Digital Logic Design Ch1-29
- 30. Complements Subtraction of unsigned numbers can also be done by means of the (r 1)'s complement. Remember that the (r 1) 's complement is one less then the r's complement. Example 1.8 Repeat Example 1.7, but this time using 1's complement. There is no end carry, Therefore, the answer is Y X = (1's complement of 1101110) = 0010001. Digital Logic Design Ch1-30
- 31. 1.6 Signed Binary Numbers To represent negative integers, we need a notation for negative values. It is customary to represent the sign with a bit placed in the leftmost position of the number since binary digits. The convention is to make the sign bit 0 for positive and 1 for negative. Example: Table 1.3 lists all possible four-bit signed binary numbers in the three representations. Digital Logic Design Ch1-31
- 32. Signed Binary Numbers Digital Logic Design Ch1-32
- 33. Signed Binary Numbers Arithmetic addition The addition of two numbers in the signed-magnitude system follows the rules of ordinary arithmetic. If the signs are the same, we add the two magnitudes and give the sum the common sign. If the signs are different, we subtract the smaller magnitude from the larger and give the difference the sign if the larger magnitude. The addition of two signed binary numbers with negative numbers represented in signed-2's-complement form is obtained from the addition of the two numbers, including their sign bits. A carry out of the sign-bit position is discarded. Example: Digital Logic Design Ch1-33
- 34. Signed Binary Numbers Example: ( 6) ( 13) Arithmetic Subtraction In 2s-complement form: 1. Take the 2s complement of the subtrahend (including the sign bit) and add it to the minuend (including sign bit). 2. Acarry out of sign-bit position is discarded. (A)(B) (A) (B) (A)(B) (A) (B) (11111010 11110011) (11111010 + 00001101) 00000111 (+ 7) Digital Logic Design Ch1-34
- 35. 1.7 Binary Codes BCD Code A number with k decimal digits will require 4k bits in BCD. Decimal 396 is represented in BCD with 12bits as 0011 1001 0110, with each group of 4 bits representing one decimal digit. A decimal number in BCD is the same as its equivalent binary number only when the number is between 0 and 9. The binary combinations 1010 through 1111 are not used and have no meaning in BCD. Digital Logic Design Ch1-35
- 36. Binary Code Example: Consider decimal 185 and its corresponding value in BCD and binary: BCD addition Digital Logic Design Ch1-36
- 37. Binary Code Example: Consider the addition of 184 + 576 = 760 in BCD: Decimal Arithmetic: (+375) + (-240) = +135 Hint 6: using 10s of BCD Digital Logic Design Ch1-37
- 38. Binary Codes Other Decimal Codes Digital Logic Design Ch1-38
- 39. Digital Logic Design Ch1-39 Binary Codes) Gray Code The advantage is that only bit in the code group changes in going from one number to the next. 損 Error detection. 損 Representation of analog data. 損 Low power design. 000 001 010 100 110 111 101 011 1-1 and onto!!
- 40. Binary Codes American Standard Code for Information Interchange (ASCII) Character Code Digital Logic Design Ch1-40
- 41. Binary Codes ASCII Character Code Digital Logic Design Ch1-41
- 42. ASCII Character Codes Digital Logic Design Ch1-42 American Standard Code for Information Interchange (Refer to Table 1.7) A popular code used to represent information sent as character- based data. It uses 7-bits to represent: 94 Graphic printing characters. 34 Non-printing characters. Some non-printing characters are used for text format (e.g. BS = Backspace, CR = carriage return). Other non-printing characters are used for record marking and flow control (e.g. STX and ETX start and end text areas).
- 43. ASCII Properties Digital Logic Design Ch1-43 ASCII has some interesting properties: Digits 0 to 9 span Hexadecimal values 3016 to 3916 Upper case A-Z span 4116 to 5A16 Lower case a-z span 6116 to 7A16 損 Lower to upper case translation (and vice versa) occurs by flipping bit 6.
- 44. Binary Codes Error-Detecting Code To detect errors in data communication and processing, an eighth bit is sometimes added to the ASCII character to indicate its parity. A parity bit is an extra bit included with a message to make the total number of 1's either even or odd. Example: Consider the following two characters and their even and odd parity: Digital Logic Design Ch1-44
- 45. Binary Codes Digital Logic Design Ch1-45 Error-Detecting Code Redundancy (e.g. extra information), in the form of extra bits, can be incorporated into binary code words to detect and correct errors. A simple form of redundancy is parity, an extra bit appended onto the code word to make the number of 1s odd or even. Parity can detect all single- bit errors and some multiple-bit errors. A code word has even parity if the number of 1s in the code word is even. A code word has odd parity if the number of 1s in the code word is odd. Example: Message A: 100010011 (even parity) Message B: 100010010 (odd parity)
- 46. 1.8 Binary Storage and Registers Registers A binary cell is a device that possesses two stable states and is capable of storing one of the two states. A register is a group of binary cells. A register with n cells can store any discrete quantity of information that contains n bits. n cells 2n possible states A binary cell Two stable state Store one bit of information Examples: flip-flop circuits, ferrite cores, capacitor A register A group of binary cells AX in x86 CPU Register Transfer A transfer of the information stored in one register to another. One of the major operations in digital system. An example in next slides. Digital Logic Design Ch1-46
- 47. A Digital Computer Example Synchronous or Asynchronous? Inputs: Keyboard, mouse, modem, microphone Outputs: CRT, LCD, modem, speakers Memory Control unit Datapath Input/Output CPU Digital Logic Design Ch1-47
- 48. Digital Logic Design Ch1-48 Transfer of information Figure 1.1 Transfer of information among register
- 49. Digital Logic Design Ch1-49 Transfer of information The other major component of a digital system Circuit elements to manipulate individual bits of information Load-store machine LD R1; LD R2; ADD R3, R2, R1; SD R3; Figure 1.2 Example of binary information processing
- 50. 1.9 Binary Logic Definition of Binary Logic Binary logic consists of binary variables and a set of logical operations. The variables are designated by letters of the alphabet, such as A, B, C, x, y, z, etc, with each variable having two and only two distinct possible values: 1 and 0, Three basic logical operations: AND, OR, and NOT. Digital Logic Design Ch1-50
- 51. Binary Logic Truth Tables, Boolean Expressions, and Logic Gates AND OR x y z 0 0 0 0 1 0 1 0 0 1 1 1 x y z 0 0 0 0 1 1 1 0 1 1 1 1 x z 0 1 1 0 NOT x y z x y z z = x y = x y z = x + y z = x = x x z Digital Logic Design Ch1-51
- 52. Switching Circuits AND OR Digital Logic Design Ch1-52
- 53. Binary Logic Logic gates Example of binary signals 3 Logic 1 2 Un-define 1 Logic 0 0 Figure 1.3 Example of binary signals Digital Logic Design Ch1-53
- 54. Binary Logic Logic gates Graphic Symbols and Input-Output Signals for Logic gates: Fig. 1.4 Symbols for digital logic circuits Fig. 1.5 Input-Output signals for gates Digital Logic Design Ch1-54
- 55. Binary Logic Logic gates Graphic Symbols and Input-Output Signals for Logic gates: Fig. 1.6 Digital Logic Design Ch1-55 Gates with multiple inputs