Personal Information
Organization / Workplace
Bengaluru Area, India India
Occupation
DFT ENGINEER
Industry
Electronics / Computer Hardware
About
• Full commitment to task and deliver high quality work according to schedule are my primary goals.
• Area of Expertise:
(1) ATPG pattern generation for stuck at model
(2) ATPG pattern simulation for stuck at model for no-timing and timing simulation
(3) ATPG pattern generation for TFT model
(4) ATPG pattern simulation for TFT model for timing and no-timing simulations
(5)scan insertion
(6) DRC analysis
(7)MBIST Logic understanding
(8)JTAG boundary scan
(9)EDT logic understanding
Specialties:
Languages: Verilog, C
Protocolas : IEEE 1149.1 jtag boundary scan
Scripting : PERL(begineer)
Editors : gvim
Tools : FastScan , DFTADVISOR,TetraMax , Questasim, Xilinx ISE , Mod...
Contact Details