Layout design of AMS/RF in 28nm, 130nm (TSMC).
Layout design for analog and mixed mode CMOS in technology nodes 20nm (TSMC & Global Foundry), 16nm FinFeT (TSMC)
Audio Amplifier, Charge pump, LDO, DCO, DLL, Impedance Detector, V2I converter, Current and Voltage bias generators,
Digital Design: Worked on Finite State Machine for SRAM controller, LFSR.
.
Knowledge of CMOS,
Design of Digital circuits and analysis,
Programming knowledge in C, assembly languages.
Familiar Scripting in PERL,TCL.
Undergone training on Static Timing Analysis(STA).
Specialties: Can work as team member and also individual.
Adopt any environment.
PNR, DRC, LVS, ERC, PV.
We’ve updated our privacy policy so that we are compliant with changing global privacy regulations and to provide you with insight into the limited ways in which we use your data.
You can read the details below. By accepting, you agree to the updated privacy policy.