Having 2.5+ of rich experience as an ASIC Verification Engineer.
Involved in Functional Verification of Complex SoC design at module & chip level.
Responsible for :
- Understanding design specification & developing test plan.
- Developing verification components.
- Writing random,directed & corner tests, Running RTL simulations at module & chip level, Debug failures.
- Hands on experience in coding assertions.
- Developing coverage bins as per plan & achieving 100% functional coverage
- Code coverage closure.
- Involved in Post silicon validation of design.
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