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Bengaluru Area, India India

PHYSICAL DESIGN ENGINEER

Electronics / Computer Hardware

$ Hands on experience in designing SOC layout using Synopsys ICC in various deep sub-micron technologies with less than 45nm $ Full chip and Block level layout implementation $ Custom placement and routing for design specific requirement $ Implementing low power techniques for multi-stage domain design $ ECO (Engineering Change Order) implementation $ Timing sign-off and Physical Verification of chip $ LVS and DFM rule checks and validation for design