ºÝºÝߣshows by User: WeiHuang26 / http://www.slideshare.net/images/logo.gif ºÝºÝߣshows by User: WeiHuang26 / Tue, 13 Oct 2015 14:57:51 GMT ºÝºÝߣShare feed for ºÝºÝߣshows by User: WeiHuang26 TN006 frequency compensation method for vf-tlp measurements /slideshow/tn006-frequency-compensation-method-for-vftlp-measurements/53881825 tn006frequencycompensationmethodforvf-tlpmeasurements-151013145751-lva1-app6891
The objective of this article is to demonstrate a frequency compensation technique for measuring the current and voltage of a device under test in a Very Fast Transmission Line Pulser (VF-TLP) test environment. The current measurement utilizes Non-Overlapping Time Domain Reflectometry, which is useful for On-Wafer testing because the measurement can be made with low profile small pitch probes, such as the Picoprobe Model 10. Further, to increase the bandwidth of the current measurement over common techniques, such as current transformers with 1GHz bandwidth, the method utilizes a resistive Pick-Off. The Pick-Off can be finely tuned to have as little insertion loss as possible, thereby enhancing the bandwidth. Although this method can also yield a DUT voltage measurement, the result suffers from numerical errors for low ohmic devices. A separate, direct measurement is presented that will demonstrate an extremely accurate voltage measurement that also utilizes frequency compensation.]]>
The objective of this article is to demonstrate a frequency compensation technique for measuring the current and voltage of a device under test in a Very Fast Transmission Line Pulser (VF-TLP) test environment. The current measurement utilizes Non-Overlapping Time Domain Reflectometry, which is useful for On-Wafer testing because the measurement can be made with low profile small pitch probes, such as the Picoprobe Model 10. Further, to increase the bandwidth of the current measurement over common techniques, such as current transformers with 1GHz bandwidth, the method utilizes a resistive Pick-Off. The Pick-Off can be finely tuned to have as little insertion loss as possible, thereby enhancing the bandwidth. Although this method can also yield a DUT voltage measurement, the result suffers from numerical errors for low ohmic devices. A separate, direct measurement is presented that will demonstrate an extremely accurate voltage measurement that also utilizes frequency compensation.]]> Tue, 13 Oct 2015 14:57:51 GMT /slideshow/tn006-frequency-compensation-method-for-vftlp-measurements/53881825 WeiHuang26@slideshare.net(WeiHuang26) TN006 frequency compensation method for vf-tlp measurements WeiHuang26 The objective of this article is to demonstrate a frequency compensation technique for measuring the current and voltage of a device under test in a Very Fast Transmission Line Pulser (VF-TLP) test environment. The current measurement utilizes Non-Overlapping Time Domain Reflectometry, which is useful for On-Wafer testing because the measurement can be made with low profile small pitch probes, such as the Picoprobe Model 10. Further, to increase the bandwidth of the current measurement over common techniques, such as current transformers with 1GHz bandwidth, the method utilizes a resistive Pick-Off. The Pick-Off can be finely tuned to have as little insertion loss as possible, thereby enhancing the bandwidth. Although this method can also yield a DUT voltage measurement, the result suffers from numerical errors for low ohmic devices. A separate, direct measurement is presented that will demonstrate an extremely accurate voltage measurement that also utilizes frequency compensation. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/tn006frequencycompensationmethodforvf-tlpmeasurements-151013145751-lva1-app6891-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> The objective of this article is to demonstrate a frequency compensation technique for measuring the current and voltage of a device under test in a Very Fast Transmission Line Pulser (VF-TLP) test environment. The current measurement utilizes Non-Overlapping Time Domain Reflectometry, which is useful for On-Wafer testing because the measurement can be made with low profile small pitch probes, such as the Picoprobe Model 10. Further, to increase the bandwidth of the current measurement over common techniques, such as current transformers with 1GHz bandwidth, the method utilizes a resistive Pick-Off. The Pick-Off can be finely tuned to have as little insertion loss as possible, thereby enhancing the bandwidth. Although this method can also yield a DUT voltage measurement, the result suffers from numerical errors for low ohmic devices. A separate, direct measurement is presented that will demonstrate an extremely accurate voltage measurement that also utilizes frequency compensation.
TN006 frequency compensation method for vf-tlp measurements from Wei Huang
]]> 507 4 https://cdn.slidesharecdn.com/ss_thumbnails/tn006frequencycompensationmethodforvf-tlpmeasurements-151013145751-lva1-app6891-thumbnail.jpg?width=120&height=120&fit=bounds document 000000 http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method /slideshow/esd-failure-analysis-of-pv-module-diodes-and-tlp-test-method/53229083 esdemctn013esdfailureanalysisofpvmodulediodes-150926182335-lva1-app6892
Bypass diodes inserted across the strings of the solar panel arrays are essential to ensure the efficiency of the solar power system. However, those diodes are found to be susceptible to potential Electrostatic Discharge (ESD) events in the process of solar Photovoltaic (PV) panel manufacture, transportation and on-site installation. Please refer [1], where an International PV Module Quality Assurance Forum has been setup to investigate PV Module reliability, and Task Force 4 has been setting guidelines for testing the ESD robustness of diodes used to enhance PV panel performance. This document explains the theory behind the ESD damage and the proper test and analysis methods for ESD failure of diodes. To demonstrate the proposed testing methodology that follows, we will be evaluating six different types of diode models as supplied by our customer, who manufactures solar panel arrays.]]>
Bypass diodes inserted across the strings of the solar panel arrays are essential to ensure the efficiency of the solar power system. However, those diodes are found to be susceptible to potential Electrostatic Discharge (ESD) events in the process of solar Photovoltaic (PV) panel manufacture, transportation and on-site installation. Please refer [1], where an International PV Module Quality Assurance Forum has been setup to investigate PV Module reliability, and Task Force 4 has been setting guidelines for testing the ESD robustness of diodes used to enhance PV panel performance. This document explains the theory behind the ESD damage and the proper test and analysis methods for ESD failure of diodes. To demonstrate the proposed testing methodology that follows, we will be evaluating six different types of diode models as supplied by our customer, who manufactures solar panel arrays.]]> Sat, 26 Sep 2015 18:23:35 GMT /slideshow/esd-failure-analysis-of-pv-module-diodes-and-tlp-test-method/53229083 WeiHuang26@slideshare.net(WeiHuang26) TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method WeiHuang26 Bypass diodes inserted across the strings of the solar panel arrays are essential to ensure the efficiency of the solar power system. However, those diodes are found to be susceptible to potential Electrostatic Discharge (ESD) events in the process of solar Photovoltaic (PV) panel manufacture, transportation and on-site installation. Please refer [1], where an International PV Module Quality Assurance Forum has been setup to investigate PV Module reliability, and Task Force 4 has been setting guidelines for testing the ESD robustness of diodes used to enhance PV panel performance. This document explains the theory behind the ESD damage and the proper test and analysis methods for ESD failure of diodes. To demonstrate the proposed testing methodology that follows, we will be evaluating six different types of diode models as supplied by our customer, who manufactures solar panel arrays. <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/esdemctn013esdfailureanalysisofpvmodulediodes-150926182335-lva1-app6892-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Bypass diodes inserted across the strings of the solar panel arrays are essential to ensure the efficiency of the solar power system. However, those diodes are found to be susceptible to potential Electrostatic Discharge (ESD) events in the process of solar Photovoltaic (PV) panel manufacture, transportation and on-site installation. Please refer [1], where an International PV Module Quality Assurance Forum has been setup to investigate PV Module reliability, and Task Force 4 has been setting guidelines for testing the ESD robustness of diodes used to enhance PV panel performance. This document explains the theory behind the ESD damage and the proper test and analysis methods for ESD failure of diodes. To demonstrate the proposed testing methodology that follows, we will be evaluating six different types of diode models as supplied by our customer, who manufactures solar panel arrays.
TN013 ESD Failure Analysis of PV Module Diodes and TLP Test Method from Wei Huang
]]> 1566 9 https://cdn.slidesharecdn.com/ss_thumbnails/esdemctn013esdfailureanalysisofpvmodulediodes-150926182335-lva1-app6892-thumbnail.jpg?width=120&height=120&fit=bounds document Black http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 ÓÃÓÚESD·ÖÎöµÄ´«ÊäÏßÂö³å²âÊÔ £¨Transmission Line Pulse - TLP Measurement£© Ôª¼þ¼¶ /slideshow/esdemc-esd-tlpintro20150125/47358134 esdemcesdtlpintro20150125-150423232100-conversion-gate02
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ÓÃÓÚESD·ÖÎöµÄ´«ÊäÏßÂö³å²âÊÔ £¨Transmission Line Pulse - TLP Measurement£© Ôª¼þ¼¶]]> Thu, 23 Apr 2015 23:21:00 GMT /slideshow/esdemc-esd-tlpintro20150125/47358134 WeiHuang26@slideshare.net(WeiHuang26) ÓÃÓÚESD·ÖÎöµÄ´«ÊäÏßÂö³å²âÊÔ £¨Transmission Line Pulse - TLP Measurement£© Ôª¼þ¼¶ WeiHuang26 ÓÃÓÚESD·ÖÎöµÄ´«ÊäÏßÂö³å²âÊÔ £¨Transmission Line Pulse - TLP Measurement£© Ôª¼þ¼¶ <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/esdemcesdtlpintro20150125-150423232100-conversion-gate02-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> ÓÃÓÚESD·ÖÎöµÄ´«ÊäÏßÂö³å²âÊÔ £¨Transmission Line Pulse - TLP Measurement£© Ôª¼þ¼¶
ÓÃÓÚESD·ÖÎöµÄ´«ÊäÏßÂö³å²âÊÔ £¨Transmission Line Pulse - TLP Measurement£© Ôª¼þ¼¶ from Wei Huang
]]> 3351 2 https://cdn.slidesharecdn.com/ss_thumbnails/esdemcesdtlpintro20150125-150423232100-conversion-gate02-thumbnail.jpg?width=120&height=120&fit=bounds presentation 000000 http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 Introduction of Transmission Line Pulse (TLP) Testing for ESD Analysis - Device Level /slideshow/introduction-of-transmission-line-pulse-tlp-testing-for-esd-analysis-device-level/45404120 esdemcesdtlpintro20150125weipomm2-150303214953-conversion-gate01
Introduction of Transmission Line Pulse (TLP) Testing for ESD Analysis - Device Level ESDEMC Technology LLC]]>
Introduction of Transmission Line Pulse (TLP) Testing for ESD Analysis - Device Level ESDEMC Technology LLC]]> Tue, 03 Mar 2015 21:49:53 GMT /slideshow/introduction-of-transmission-line-pulse-tlp-testing-for-esd-analysis-device-level/45404120 WeiHuang26@slideshare.net(WeiHuang26) Introduction of Transmission Line Pulse (TLP) Testing for ESD Analysis - Device Level WeiHuang26 Introduction of Transmission Line Pulse (TLP) Testing for ESD Analysis - Device Level ESDEMC Technology LLC <img style="border:1px solid #C3E6D8;float:right;" alt="" src="https://cdn.slidesharecdn.com/ss_thumbnails/esdemcesdtlpintro20150125weipomm2-150303214953-conversion-gate01-thumbnail.jpg?width=120&amp;height=120&amp;fit=bounds" /><br> Introduction of Transmission Line Pulse (TLP) Testing for ESD Analysis - Device Level ESDEMC Technology LLC
Introduction of Transmission Line Pulse (TLP) Testing for ESD Analysis - Device Level from Wei Huang
]]> 12489 15 https://cdn.slidesharecdn.com/ss_thumbnails/esdemcesdtlpintro20150125weipomm2-150303214953-conversion-gate01-thumbnail.jpg?width=120&height=120&fit=bounds presentation 000000 http://activitystrea.ms/schema/1.0/post http://activitystrea.ms/schema/1.0/posted 0 https://cdn.slidesharecdn.com/profile-photo-WeiHuang26-48x48.jpg?cb=1552370707 Hardware engineer interested in digital or RF analog designs or electromagnetic compatibility, signal integrity, electrostatic discharge anlaysis, desire challenging and innovative experience http://esdemc.com https://cdn.slidesharecdn.com/ss_thumbnails/tn006frequencycompensationmethodforvf-tlpmeasurements-151013145751-lva1-app6891-thumbnail.jpg?width=320&height=320&fit=bounds slideshow/tn006-frequency-compensation-method-for-vftlp-measurements/53881825 TN006 frequency compen... https://cdn.slidesharecdn.com/ss_thumbnails/esdemctn013esdfailureanalysisofpvmodulediodes-150926182335-lva1-app6892-thumbnail.jpg?width=320&height=320&fit=bounds slideshow/esd-failure-analysis-of-pv-module-diodes-and-tlp-test-method/53229083 TN013 ESD Failure Anal... https://cdn.slidesharecdn.com/ss_thumbnails/esdemcesdtlpintro20150125-150423232100-conversion-gate02-thumbnail.jpg?width=320&height=320&fit=bounds slideshow/esdemc-esd-tlpintro20150125/47358134 ÓÃÓÚESD·ÖÎöµÄ´«ÊäÏßÂö³å²âÊÔ £¨Trans...