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- 1. CHRISTOPHER J. REDER 107 RANCHERO COURT CARY, NC 27513 PHONE (919) 238-9271 E-MAIL: REDERCJ@GMAIL.COM OBJECTIVE Self-starter looking for a fast-paced environment full of challenges, teamwork, and quality results. EDUCATION Auburn University 1995-2000 Major: B.S. Electrical Engineering Minor: Business GPA: 3.83/4.00 Major GPA: 3.89/4.00 WORK EXPERIENCE Cisco Systems August 2013 present Technical Leader Lead responsible for packet datapath, memory manager, and performance of WAASnet (Wan Optimization) project Optimized performance of code via opensource tools and then rewriting code to improve stack and cache usage. Worked with TAC on customer calls to root-cause issues in the field. Worked with other engineers to root-cause and fix issues where there was a lack of progress. Implemented packet capture in pcapng format. This includes a client program that enables the capture, capturing of packets, and capturing additional debug information added to the capture file. System logs, data structures, and packets are all co-mingled and captured from multiple threads. Responsible for netmap, a packet delivery mechanism from NIC to userspace adapted to Linux. Fixed issue in opensource code and delivered patch back to author. Created utility that tracked packets in the system and measured the time between components in the system. Added code to metadata to trace buffer owners in the system. Tracked down bugs reported by engineers in all components. Extreme Networks March 2012 August 2013 Senior Software Engineer Software engineer responsible for all optics and phys throughout the product line. Optics responsible for 10% of company revenue. Added infrastructure for new products and was one of first engineers to bootstrap incoming hardware. Developed first interface for ports and optics at 100G. Responsible for incorporating new optics support into all products from preliminary testing to production release. Implemented DDMI feature for QSFP and CFP2 according to MSA. Implemented Energy Efficient Ethernet feature from CLI to HAL . Interface with field engineers to troubleshoot link issues. Interface with vendors to troubleshoot issues with both hardware and software. Optics include XFP, SFP, SFP+, QSFP+, CFP2 (multiple vendors) Phys include operation at 100M, 1G, 10G, 40G, 100G (Broadcom Phy) Added debug features for phys to help troubleshooting in the field. Added debug packet capture utility and packet generation utility for use by engineers. Overture Networks (merged with Hatteras Networks) March 2011 March 2012
- 2. Senior Software Engineer II Software engineer responsible for driver development. Included creating, reviewing and implementing designs. Mentored Junior engineers for project development. This included guidance during design phase, implementation phase, and during troubleshooting scenarios. Worked on developing drivers for new shelf which will run Linux both on Main Switch card and line interface cards. Drivers included a software forwarder as a Linux module along with a proprietary ring buffer for packets destined for userspace. Filtering was done on mac address, ethertype, vlan, or any combination thereof. Each physical port had its own receive queue and receive thread in userspace. Developed driver for Fpga access which memory maps the kernel into user space and is built as a library for the system to use for access. Ongoing support for customers and system test engineers for production release and field support. Assisted hardware engineering in selection of new microprocessor for new Ethernet shelf. This involved researching available processors, interfaces, price points, and family derivatives for future use. Investigated multiple processors for product development. Evaluated EZchip NPA3 for development in a small pizza box application. Developed code to handle all packet types and multiple service types. This included internal packet fragments (unicast and multicast), uplink traffic, filtering, stripping/stacking of vlan tags, packet capture. EZChip development was also tested for efficiency by counting the number of clock cycles per packet through the TOPs. Worked with EZMde and EZSim to develop and test code. Hatteras Networks September 2008 March 2011 (acquired by Overture Networks) Senior Software Engineer Software engineer responsible for software forwarding engine. Added new features to forwarding datapath including packet filtering, color import and export, hierarchical policers, packet capture, vlan stacking/stripping and improvements for accuracy to policers and shapers. Also included testing to find inefficiencies in the code where cycles could be saved. Despite adding many new features, overall data throughput remained consistent. Added new features to NPU on larger platform boxes including L2 Loopback, packet capture, hierarchical policers, Developed code in NPU to support MLPPP implementation which included filtering for ARP packets, dropping unknown packets, and adding mac addresses to outgoing packets. Added code to bootloader to allow LZMA compression as well as gzip (legacy) for software image loading. Project lead on multiple CPE projects. HN418G which included a SFP uplink capable of using fiber or copper uplinks. HN448 which included a new Broadcom 5-port switch for customer facing Ethernet ports. Investigated Cavium 5230 for use on an optical NID. Ported software forwarder and tested multiple scenarios. Tracked down performance improvements with use of asynchronous work calls, prefetching into cache, and fine tuning BSP code. Gave feedback on hardware designs for software needs including gpio pin selection, addressing of Ethernet phys, and interface connections. Mentored Junior engineers for project development. This included guidance during design phase, implementation phase, and during troubleshooting scenarios. Digital Concepts Inc. January 2007-September 2008 Senior Engineer Design Engineer responsible for writing software for Single Board Computer (SBC) for fitness equipment. Project involved researching Linux and open source software to adapt to the ARM9 SBC. Developed code for hardware based on U-boot bootloader, Linux 2.6.21 kernel, and OpenEmbedded without any prior knowledge of Linux.
- 3. StarTrac ESpinner is now in production running Linux while controlling many external peripherals including IPODs, real time clock, video decoder, tv tuner, touchscreen, FPGA, glue logic, and communication with other processors via SPI interface. Worked on hardware side to troubleshoot both circuit design and manufacturing issues. Other Projects have included cross trainers, bikes, elliptical trainers, and treadmills. Experience in working with software debuggers, oscilloscopes, logic analyzers, protocol analyzers to solve hardware and software problems. Software Responsibilities Develop Linux system on new hardware platform. Work with open source software to develop system software. Work with Altia Design to develop GUI interface for user input through touchscreen interface. Work with customer to develop attractive, easy to follow menus with many state of the art features. Write device drivers for IPODs, real time clock, video decoder, touchscreen, FPGA, tv tuner, remote control interface, and communication protocols to other processors. Coordinate efforts between coworkers to deliver software pieces and deliverables to customer Hardware Responsibilities Troubleshoot boards after returning from manufacturing. Give suggestions for improvements to aid in development from the software side. ADTRAN Inc. April 2000-December 2006 Design Engineer Design Engineer responsible for designing microcontroller-based ADSL and HDSL products. Projects have included HDSL linecards, ADSL linecards, ADSL DSLAMS, IPTV systems, and Media Converter. DSLAM business now ranks third nationally among equipment providers behind Alcatel and Lucent. DSLAMs have now been approved in all major RBOC accounts. Experienced in working with software debuggers, oscilloscopes, logic analyzers, protocol analyzers to solve hardware and software problems. Hardware Responsibilities Lead Project engineer on multiple projects including 24 and 48 port DSLAMs, ADSL and HDSL linecards, 1200F IPTV video box and environmentally sealed Gigabit Media Converter. Responsibilities include designing and drawing schematics for new designs using Workview Office, working with layout personnel and Cadence Allegro for proper layout on board, working with manufacturing to build prototype units. Involved with design reviews of products to be responsible for and projects for other engineers. This involves reviewing design schematics, suggesting implementation ideas for software to interface with hardware, and additional hardware to include for product enhancements. Once project has been built, responsible for working with products to test functionality of all pieces of the hardware including clock lines, FPGA interfaces, and peripheral devices. This involves using oscilloscopes to verify proper terminations, integrating software to debug FPGA interfaces, and setting up real-world test environments. Projects include the following with hardware responsibilities: Quad HDSL2 linecard, Octal ADSL card with integrated splitters, 24 port Ti-based ADSL DSLAM, 24-port and 48 port Infineon-based DSLAM with integrated splitters. The current 24 and 48 port DSLAMs can support 96 different project variations based on part loading on the same board layouts. These changes allow ADTRAN to use up to 3 boards to build a custom loading of parts for the customer to provide differences in powering options (AC, DC, SPAN), number of ADSL ports, network feed differences, and an on-board analog modem for connecting remotely to the craft menus. Software Responsibilities
- 4. Lead Software engineer on multiple products. Responsibilities include writing software features for new hardware interfaces (e.g. ADSL chipset interface, GIGE Phy interface), implementing new software requests for customers, and debugging real-world issues in the field. Software languages include C, assembly for 8051, and C++. There are multiple stages to software development within the company. At the beginning, there is a need to develop and integrate multiple pieces of code to interface to the hardware. For example, state machines are used to interface with ADSL DSP chips to retrieve and manage performance monitoring statistics, provisioning parameters, status indication, and debugging utilities. Lead for software architecture and integration with particular emphasis on big-picture ideas. I.E., how will one feature affect another? Participant in code reviews, code development, and ideas for implementation for other engineers. Project Lead Responsibilities Interface with multiple groups for project completion including: compliance department for FCC, UL and NEBS testing, manufacturing and test departments to improve efficiency of testing for increased throughput, documentation department for accurate documentation for customers, Product Qualification department for testing of product, Marketing to design product that customers wanted. Technical Support liason to help interface with answers to questions about implementation in the field, issues from the field, and future support for troubleshooting in the field. Training Responsibilities Co-op and Intern liason for design group responsible for guiding new projects from concept to execution. Guide co-ops to provide meaningful work for products and instructed them on software design and how it interfaces with the products. Projects have involved programs for use in development using Microsoft Visual C++, software within the unit written in C to interface with analog modem chip, integrated webserver, and ADSL debug interface. Recruiting Responsibilities Auburn University new-grad recruiter responsible for talking to students about the company, interviewing them on campus, and making hiring recommendations to engineering Vice Presidents. Interview additional students on campus for full-time positions and report interview results to engineering managers for hiring recommendations. Polytron Inc. June-September 1999 Engineering Intern Project Lead for two projects. Responsibilities included producing AutoCAD drawings, preparation of electrical specifications, control panel testing, PLC programming, and daily correspondence with customers and vendors. Developed marketing brochure for recruiting purposes, training brochures for operators, and contributed to various technical-writing assignments. ColumbusPower 1997-1998 (Fall/Spring Rotation) Management Trainee / Co-op Performed the fundamentals of commercial electrical construction including installation, planning, and payroll. COMPUTER AND TECHNICAL SKILLS Experienced with Embedded C programming, python, bash, EZChip Assembly, AMCC NPU Assembly, Embedded 8051 Assembly. Experienced with Ethernet, IP, ATM technologies, and troubleshooting real-world networking problems. Experienced with opensource tools: oprofile, likwid, tmux, screen Experienced with the following processors: x86, XLS, EZChip NPA3, Cavium 5230, AMCC PPC440, ARM9 (AT91RM9200), Virata Helium 210 processor, Intel based 8051
- 5. Experienced with development packages: Subversion, Clearcase, SourceSafe. Experienced with Ixia and Spirent test equipment. Experienced with software tools: SublimeText, Notepad++, SlickEdit, UltraEdit, Multi-Edit, Putty, xMing, Microsoft Office, WinMerge, AutoHotKey, Bash. Experienced with Linux: Debian, Ubuntu, Fedora distributions for PC as well as embedded Linux for embedded use. INTERESTS AND ACTIVITIES Independent Photography for personal enjoyment Keeping up with my three young sons! REFERENCES AVAILABLE UPON REQUEST