Pythonによるカスタム可能な高位設計技術 (Design Solution Forum 2016@新横浜)Shinya Takamaeda-Y
?
Veriloggen is a Python library that allows users to generate Verilog HDL code from Python. It provides objects and methods to define RTL modules in Python, including module inputs/outputs, registers, assignments, always blocks, etc. When the Veriloggen object is passed to the to_verilog() method, it traverses the object and generates equivalent Verilog HDL code. This allows rapid prototyping of RTL designs in Python without having to write low-level Verilog code directly.
12. [Cython] is a programming
language that makes
writing C extensions for the
Python language as easy as
Python itself.
http://cython.org/docs/current/src/quickstart/overview.html
http://cython.org/docs/current/src/quickstart/overview.html
28. Cython の関数定義
? Cython では、Python 関数だけでなく?
C 関数も定義できる(Pythonic に!)
? C 関数は Python コードから?
直接呼びだせないことに注意
29. ? cdef キーワードで定義
? cpdef キーワードを用いると、?
Python からは Python 関数を、?
C からは C 関数を呼んでくれる(はず)
cpdef int tarai(int x, int y, int z):
if x <= y:
return y
else:
return tarai(
tarai(x-1, y, z),
tarai(y-1, z, x),
tarai(z-1, x, y)
)