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Tapan Bhargave Detailed Work Experience
TECHNICAL & ENGINEERING EXPERIENCE
Founder & CEO, EarthBenign March 2012 - Present
Austin, TX(www.earthbenign.com)
 Served as de facto Product Manager, managing the Agile Scrum process:
o Owned the backlog and storymaps; wrote user stories and epics
 Sketches,wireframes, mockups creation
o Ran the Scrum ritual meetings (Release Planning, Backlog Grooming, Sprint Planning, Daily
Standups, Retrospectives)
o Did all the above for both the product (a complementary currency solution) and the website
project
 Served as de facto Enterprise Architect
o Architected the blockchain-based solution
o Created business and technology roadmaps
o Managed the IP and Partnerships strategy
o Became an SME in blockchain technologies and cryptocurrencies
 Served as de facto Engineering lead
o Managed code commit to the Git
o Chose the MEAN stack on which to develop, and deployed it for the team
Systems ProcessEngineer & SOA ARCHITECT, SourcePulse,
Austin, TX(www.sourcepulse.com) April 2008-January 2010
 SOA development aimed at enterprise software applications within (mostly) government domains
 Developed on IBM’s BPM Middleware stack: Websphere and Rational
 Business Process Modeling, Business Analysis
 Developed on IBM Software
o Websphere: Integration Developer, Business Modeler, Business Services Fabric, Application
Server Toolkit
o Rational: Data Architect, Application Developer, Software Architect
 Development of in-house business rules management and execution engine
 Development of comprehensive IT asset content packaimed at government domain: concepts covered and
implemented include: ontology,business-capability mapping, modeling for deployment, Web Services and
schema (WSDLs and XSDs (XML Schema Definition))
 Coding in Java and WS-BPEL (Web Services Business Process Execution Language)
Chip Tools Design Engineer & Chip Data Management, IBM Corporation: STI Design Center
Austin, TX(www.ibm.com) January 2005 – August 2005
 Part of the CELL architecture design team
 IBM’s premier Chip designed for high-end multimedia applications
 Dubbed “Supercomputer on a chip” by popular media; recognized as “most powerful chip ever”
 STI – Sony, Toshiba, IBM joint venture
 Responsible for chip data library management, Database structure, design/implement the logic design
environment to support the entire project, Cadence tools customization.
 Coding of Front-end logic Tool algorithms in scripting languages Korn Shell, PERL, and SKILL
 General Purpose programming language : C
 Enabled tools: DB interfaces, logic release process,VHDL build processes,layout device libraries
Field Application Engineer, Agetak Software ( www.bdipl.com) & (www.agetak.com)
Austin, TX January 2004 – November 2004

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 Customer on-site product deployment, technical support,systems engineering
 Authored technical marketing literature: powerpoint presentations, product fact sheets and brochures, white
papers,positioning papers and trade magazine articles, along with website content
 Worked with development team to define product features based on field input
 Management of full sales life cycle to achieve success with customers
 Did customer visits,conference calls, trade shows
 Wrote internal competitive comparison literature based on market research
 Troubleshooting,validation and testing of final software products
 Virtual Data Warehouse,relational database management software on MS SQL, Oracle, IBM DB2
PowerPC Engineer, IBM Corporation: MicroElectronics Division
Research Triangle Park, NC (www.ibm.com) April 2001- January 2002
 Design & verification analysis,technical marketing of PowerPC embedded processors &cores
 Team owned PowerPC Chip design and directed PowerPC Product launches
 Part of team that worked closely with Application Engineering and Development Teams (VLSI, circuit, layout
engineers) to define chip roadmap, features, logic, functional verification.
 One of only 2 IBM Representatives to the RapidIO On-Chip interconnect Marketing Working Group;
promoted IBM PowerPC
 Frequent writer for IBM’s PowerPC website as well as IBM’s “MicroNews” Publication
 Team did customer visits, conference calls, trade shows;
 Hosted customer meetings, answering technical questions.
 Hosted internal meetings and conference calls, laying out future PowerPC strategy.
 Authored and distributed official IBM PowerPC literature, making different versions for customers, Sales Teams,
FAE and Advanced Technology Engineers.
 Worked with Application Engineers to troubleshoot and test prototypes and returned chips/boards from customers,
supporting customers by providing troubleshoot databases.
 Wrote internal competitive comparison literature based on market research
ENTREPRENEURIAL EXPERIENCE
Principal and Founder, Streaming Gold Real Estate January 2006 – May 2008
www.streaminggoldrealestate.com
A Hotel investor, developer and builder in Austin,TX with a hotel construction subsidiary company, Earnest
Development
 Initiated and spearheaded Land Acquisition and development of two new-build side-by-side hotels on 5.5 acres
of land in north Austin as well as one on 1.5 acres in south Austin nearthe airport
 Analyzed appropriate brand placement, financing, construction costs,demand generators,hotel performance
projection spreadsheets
 Past construction projects include $1M+ Condo Project in East Austin and $1.2M+ Custom Home in Lakeway
ChiefExecutive Officer and Founder, Aviraam Networks
Santa Barbara, CA Nov 1999– Nov 2003
 Key contributorto chip design, fabrication & verification: Nanotechnology - system-on-chip CMOS logic
combined w/ MEMS structures; product aimed at drastically reducing semiconductor feature sizes
 Final chip testing,customer On-site maintenance, and training for chip deploypment.
 Responsible for startup company's direction and technology strategy.
 Identified and acquired partnership contracts with university and Venture Capital firms, and Angels.
 Authored technical marketing literature: product fact sheets and brochures,white papers,positioning papers and
trade magazine articles, along with website content
 Wrote business plan and its presentation,along with financial and marketing plans.
 Authored and performed technical marketing (powerpoint) presentations to partners and customers.

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 Addressed investorand customer queries regarding company’s product technology,roadmap, path to profitability,
and negotiated terms of partnership and investment.
Director, Texas Territory Acquisitions, The Real Market Experts ofNevada Jan – June 2006
www.investorconcierge.com www.realmarketexperts.com
A Real Estate Investment Acquisition firm with over 18,000 investors subscribing to its services
 Director of acquisitions and development for all realestate in the state of Texas
 Responsible for real estate statistics verification and eventual upload into the Investor networks’
central repository
PROGRAMMING ANDSOFTWARE EXPERIENCE
IBM Websphere Class/Activity Diagrams  Java  BPEL  C#  C++ (Object oriented)  VHDL  Verilog 
Cadence verification tools  SKILL (Cadence)  PERL  Unix (Korn shell and AIX)  Linux  MATLAB 
Atlas: Deckbuild, TonyPlot, DEVEDIT (Semiconcuctor Device Physics)  ExpressPCB (Printed Circuit Board)  P-
Spice  Tanner Tools: L-Edit, S-Edit, T-Spice (VLSI)  I-DEAS (MEMS)  Labview  Finle: Prolith (Lithography
Simulation Software)  HP/Keithley Test Systems

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TAPAN PRAKASH BHARGAVE
DETAILS OF ACADEMICCOURSEWORK
Coursework and Projects completed at Cornell University: 1995-1999
Solid-State Power Switching Circuits and Audio Amplifiers
 Investigated field of power amplification and switching circuitry; included frequent labs.
 Linear-mode/Switching-mode transistors,Power regulation: linear vs.switching.
 Audio amplifier architectures, Pulse Width Modulation, H-bridge; mixed-signal designs.
 Distortion reduction techniques and feedback; frequent SPICE simulations.
 Integrated options for audio amplification: Powered subwoofers,etc.
Electronic Circuit Design
 Lab experiment and simulation (SPICE) course.
 Diodes & Diode Circuits; BJT & MOSFET Characterstics; CMOS Inverter Circuit.
 BJT Common Emitter Amplifier: Frequency Response.
 Differential Amplifier; Multiple-Stage TransistorAmplifiers.
VLSI Digital Design
 Did circuit schematics, layout, and simulation of various digital circuits (mostly CMOS).
 Projects: CMOS inverter, 4-input XOR gate, 4-bit Counter, 8-Bit Adder.
 Undertook and completed a 64x16 bit 3-T DRAM project , with another partner.
Nanofabrication Technology
 Hands-on fabrication laboratory course, at CNF lab (Cornell Nanofabrication Facility).
 Completed a MOS/MEMS fabrication project from blank wafers to functional devices.
 Lithography, diffusion, ion implantation, thin film deposition,etching, metallization, assembly.
Silicon and Compound Semiconductor Electronics (2-semester sequence)
 Comprehensively developed basic silicon transistormodels and device physics.
 In lab, measured characteristics: carrier transport,BJT, MOSC, MOSFET characterization. etc.
 Ideal DC characteristics, channel length extraction, study of SCE and NWE, DIBL, etc.
 HEMTs, HBTs, JFETs, various otherGaAs structures (MESFETS, etc), SiC and InP devices, SiGe, biCMOS

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