DLDLab 8 half adder
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This document describes an experiment to study the operation of a half adder circuit using XOR and AND gates. The circuit was built using two ICs - 74LS86 and 74LS08 - on a breadboard. The 74LS86 IC implements the XOR function and the 74LS08 IC implements the AND function. Different input combinations of 0s and 1s were applied to the circuit using switches and the corresponding outputs for sum and carry were observed on LEDs, verifying the truth table of a half adder. The objective of studying the working of a half adder circuit was achieved through this experiment.
DLDLab 8 half adder
- 2. Lab. No. 8 Objective: To study the operation of half adder circuit using XOR and AND gates. Apparatus: 1. IC 74LS86 & 74LS08 2. Wires 3. Cutter 4. AM 2001 Trainer Circuit Diagram: Integrated Circuit (IC): Truth Table of Half Adder gate: 74LS86 74LS08 = x + y = x . y
- 3. Truth table Inputs Outputs X y Carry Sum 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0 Procedure: 1. I took wires and cut them with the help of cutter. 2. I connected both the ICs on the breadboard. 3. I took two wires (white) and connected each of them at 7th pin of both the ICs on breadboard and grounded them. 4. Then I took two wires and connected them separately at 14th pin of both the ICs on the breadboard in order to give the circuit 5V of voltage supply. 5. I connected another pair of wires (Orange and blue) at pins 1 and 2 of the IC 74LS86 and connected the other end of them at pins 12 & 13 of the IC 74LS08. 6. I connected another pair of wires at pins 1 and 2 and connected the other end of them at the switches S1 and S7 to give inputs. 7. Then I connected one end of another wire with pin 3 of IC 74LS86 and another wire at pin 11 of IC74LS08 in order to get output and other ends of them with LEDs l4 and l5. Pin 3 was used for the result of sum and pin 11 for carry¡¯s output. 8. Then I started giving inputs using switches S1 and S7. Firstly I keep both the switches at low level that is ¡°0¡± and got ¡°0¡± in both carry and sum. 9. Then I keep S1 high and S7 low and got ¡®0¡¯ carry and ¡®1¡¯ as a sum. 10. Then I keep S1 low and S7 high and got ¡®0¡¯ carry and ¡®1¡¯ as a sum. 11. Then I keep both S1 and S7 high and got ¡®1¡¯ carry and ¡®0¡¯ as a sum. Result: Hence I studied the operation of Half adder circuit using XOR and AND gates.