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CURRICULUM VITAE
E-mail: narasikarnati@gmail.com
NARASIMHAREDDY.K Mobile: +91-9701156155
CAREER OBJECTIVE:
Seeking challenging and rewarding contracts in Embedded Design where I have enough scope for
development of my technical intelligence and add value to the organization by being an integral part of a
Research and Development team with complete perfection and professionalism.
EXECUTIVE SUMMARY: Sr Hardware Design Engineer
 A dynamic 4.8 years of experience in a Embedded Design & Development in Reliable
Technosystems India (P) Ltd., Hyd from JAN 2011 to till.
 Gained experience with various processors and controllers such as ADSP SHARC, Xilinx Zynq
XA7020, Texas CC3200 Zigbee, ACTEL SoCFPGAs, Proasic3 and Fusion FPGA.
 Gained experience on System level De-bugging and board bring up.
TECHNICAL SKILLS:
 Hands on schematic (Orcad, Dxdesigner, Altium Designer) & closely worked with PCB Layout teams.
 Strong Exposure to Digital & Mixed signal circuit designs.
 Having Experience with FPGA based Families like Actel ProASIC3 and IGLOO.
 Having Experience with SoC FPGAs based Families like Actel A2F Series, Xilinx Zynq XA7020
 Having Experience with Processors like ADSP21060, ADSP21062 and TMS320F2810.
 Having Experience with Texas CC3200 Zigbee.
 Having Experience with IOT project
 Having experience in BOM Preparation, Components selections for Military & domestic
 Having Experience on Converter types like ADC and DAC
 Mostly working on LVDT, OP-AMP(TI & analog Devices), LCD display, CPLD and Flash
 Communication protocol like UART, DDR2, Ethernet SPI, I2C, WIFI, USB, PCI and MIL-STD-1553B.
 Having Experience in serial interfaces like RS232, RS422 and RS485
 Selection of power supply design like switching regulators and Linear Regulator.
 Having Knowledge on EMI/EMC guidelines on Layout.
 To actively take the part in involving Product and handle complete hardware design cycle in project.
 Boot loader program implementation for IAP and Application Modes in eNVM
 Expertise in lab Instruments: Oscilloscope, Function generators, Bus analyzers
Tools:
 Schematic Tools: Cadence (OrCAD), Altium Design and Mentor Graphics (DxDesigner).
 PCB Tools : Allegro, PADs and Cadstar
 Simulation Tools: PSpice速 A/D, LTspice.
 FPGA Programming tools like Libero IDE, LiberoSoC
 Good C fundamentals
 HDL : Verilog, VHDL
 HDL Simulation Tools : Questasim, Modelsim
1
PROFESSIONAL EXPERIENCE:
Project 1: Design and Implemented of Logic Board LRF
Company: Reliable Techno Systems India (P) Ltd
Client: IRDE, Hyderabad
Role: Hardware Design Engineer
Tools: Vivado Design Suite, Orcad capture, Pspice, Allegro
Period: 8 Months
Description:
The Logic board is one of the modules from LRF (Lesser Ray Finder).This is intermediate
communication module. It contains zinq (XA7Z020) processor is collecting the data from High
voltage power supply signal, video signals, Trigger signal from other module. Decoding this
information and passing through uart and I2c to other main module.
Roles & Responsibilities:
 Hardware Design and Development of full project.
 Understanding different types of components ADSP, FPGA, ADC, DAC, UART, Mil-std 1553 and Flash.
 BOM preparing, Components placements guidelines and Isolations discussions with client.
 Board level, System level Debugging, integrating and product delivery.
Project 1: Design of Dual Channel Digital Actuator Controller (DAC)
Company: Reliable Techno Systems India (P) Ltd
Client: SINT, Hyderabad
Role: Hardware Design Engineer
Tools: DxDesigner, Pspice, Flash Pro, Allegro Period: 8Months
Description:
The Digital Controller is having DSP processor with of 30ns instruction execution
capability and used 16- channels ADC and 4-channels DAC. Input signal is giving to Mil-std1553 or
through ADC to interact with the main system. Since the Controller is going to place within the
missile, all of the components were chosen as per Mil STDs. The OBC will control the position and
velocity of the linear actuator with the main system command signal .The linear actuator is consist
BLDC motor and LVDT. The PID technique used to control the position & velocity is analog PWM
technique.
Roles & Responsibilities:
 Hardware Design and Development of full project.
 Understanding different types of components ADSP, FPGA, ADC, DAC, UART, Mil-std 1553 and Flash.
 BOM preparing, Components placements guidelines and Isolations discussions with client.
 Board level, System level Debugging, integrating and product delivery.
Project 2: Smart Weighing WIFI
Company: Reliable Techno Systems India (P) Ltd
Client: Smatron pvt ltd
Role: Senior HW Design Engineer
Tools: Orcad Capture, LTSpice, Cadstar Period: 5 Months
2
Description:
The Smart WIFI is containing Texas CC3200 Micro controller. It has 4 channels 12-bit
ADC and Integrated WiFi. We used FTDI IC for converting data from USB to UART. Using weight
from strain gauge reading the data through adc and passing through wifi to cloud from that to using
android app will know the status, as well as displaying on LCD.
Roles & Responsibilities:
 Hardware Design and development of full project
 BOM preparation ,component selection like CC3200, FT223D and base selection
 Interacting the layout designer for component placement.
 Understanding different Interfaces like USB, LCD and WIFI.
Project 3: TRILOGY eEDI
Company: CMC LTD
Client: Schneider Electric
Role: Senior HW Design Engineer
Tools: DxDesigner, LTSpice, Cadstar Period: 5 Months
Description:
The eEDI is merging of two boards FDSI-FBM and FCP270. It has an AMD SC520
Microcontroller is used to control the system, this handling communication management between the
foreign data systems and the FDSI-FBM. The two internal UARTs of the SC520 (UART1 and
UART2) provide interlink between modules and IrDA communication The operating system and all
static code will be stored in 2 Flash memory chips connected to the GP Address Bus and the SDRAM
data bus.
Roles & Responsibilities:
 Merging the two board schematic in Dxdesigner
 Interacting with client for design changes and updates.
 Interacting the layout designer for component placement.
 Understanding different Interfaces like PCI, Ethernet (RJ-45,SFF,SFP)and Flash.
Project 4: Smart Wi-Fi based pond Management
Company: Reliable Techno Systems India (P) Ltd
Role: Design Engineer
Tools: DxDesigner, Pspice, Flash Pro, Soft console, Allegro Period: 8 Months
Description: This is Zigbee based IOT project and the Pond management is consisting of continuously
monitoring 3 module. They are Aqua status monitor, Sensor Module and Aerator control module. In
that we used GSM900 for getting the information in Msg format and Using CC3200 for data sent to
cloud location, data read through the android App. Based on the sensor module report, auotomatically
on the Aerators.
Roles & Responsibilities:
 Complete hardware design
 Interacting with client for design changes and updates
 Preparation of Design documents, Layout guidelines & Test Report Summary documents.
 Hardware Debugging, system level Testing and Product delivery.
3
Project 5: ASTRA Rotary Electro Mechanical Actuator (REMA).
Company: Reliable Techno Systems India (P) Ltd
Client: RCI, Hyderabad
Role: Design Engineer
Tools: Orcad, Pspice, Allegro Period: 10 Months
Description:
Actuator Electronics System is a sub-system of Rotary Electro Mechanical Actuator
(REMA). This system is designed to drive the three phases Brush Less DC (BLDC) Motor. It
receives position, velocity and current feedback signals from Rotary potentiometer, speed control
adapter and current sensors respectively. The Hall Effect sensors provide rotor position information
required for electronic commutation. Based on the above sensors information, position, velocity and
current loops are executed to deliver the power to the motor.
Roles & Responsibilities:
 Schematic Design using orcad and involved in board level bring up
 Open-Loop and Closed-loop Performance tests checking
 Preparation of Design documents, Layout guidelines & Test Report Summary documents.
 Involved in Environmental tests like Burning test, Thermal test and dump test.
Project 6: Electronic controller design for Electro mechanical Actuator (EMA)
Company: Reliable Techno Systems India Pvt Ltd.
Client: RCI, Hyderabad
Role: Test Engineer
Tools: Altium, Pspice, Visual DSP++, Allegro Period: 8 Months
Description:
The EMA used to test different types of motors and observing the speed of motor and
current consuming of each coil. The observed values displayed on LCD display. The OPC is featured
with Advanced ACTELs FPGA (Smart Fusion) which is having Cortex-M3 micro controller, ABPS,
ADC, DAC, UART, I2C, SPI and GPIOs. Here The FPGA read the data from Current sensors and
Hall sensor, and display the motor speed and current on the LCD Display. Here we also use motor
control IC for to control motor. It receives position, velocity and current feedback signals from
LVDT, speed control adapter which is a tacho processing circuit and current sensors respectively.
Roles & Responsibilities:
 Involved Hardware design and development
 Open-Loop and Closed-loop Performance tests checking
 Understanding different types of components FPGA, Motor Control IC, LCD and MOSFETs.
 PCB Placement , keeping isolation and processor data & address lines Length matching
 Board level and System level Debugging and Testing.
Academic Profile:
 M.Tech in VLSI System Design from JNTU HYD 82% 20013-15.
 B.Tech in Electronics & Comm. from JNTU HYD 67% 2006-10.
4
 Intermediate from Board of Intermediate Education 80.7% 2004-06.
 SSC from Board of Secondary Education 76.9% 2003-04
Personal Profile:
Name : Narasimha Reddy Karnati
Fathers name : Veera Reddy
Date of birth : 05-08-1989
Martial status : Single
Nationality : Indian
Address : Plot No:170, Telecom nagar, Gachhibowli, Hyderabad -500032
Declaration:
I do hereby confirm that the facts given by me in this bio-data is true to the best of my knowledge.
Place : Hyderabad. Yours Truly,
Date : Narasimha Reddy Karnati
5
 Intermediate from Board of Intermediate Education 80.7% 2004-06.
 SSC from Board of Secondary Education 76.9% 2003-04
Personal Profile:
Name : Narasimha Reddy Karnati
Fathers name : Veera Reddy
Date of birth : 05-08-1989
Martial status : Single
Nationality : Indian
Address : Plot No:170, Telecom nagar, Gachhibowli, Hyderabad -500032
Declaration:
I do hereby confirm that the facts given by me in this bio-data is true to the best of my knowledge.
Place : Hyderabad. Yours Truly,
Date : Narasimha Reddy Karnati
5
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Hardware Design engineer

  • 1. CURRICULUM VITAE E-mail: narasikarnati@gmail.com NARASIMHAREDDY.K Mobile: +91-9701156155 CAREER OBJECTIVE: Seeking challenging and rewarding contracts in Embedded Design where I have enough scope for development of my technical intelligence and add value to the organization by being an integral part of a Research and Development team with complete perfection and professionalism. EXECUTIVE SUMMARY: Sr Hardware Design Engineer A dynamic 4.8 years of experience in a Embedded Design & Development in Reliable Technosystems India (P) Ltd., Hyd from JAN 2011 to till. Gained experience with various processors and controllers such as ADSP SHARC, Xilinx Zynq XA7020, Texas CC3200 Zigbee, ACTEL SoCFPGAs, Proasic3 and Fusion FPGA. Gained experience on System level De-bugging and board bring up. TECHNICAL SKILLS: Hands on schematic (Orcad, Dxdesigner, Altium Designer) & closely worked with PCB Layout teams. Strong Exposure to Digital & Mixed signal circuit designs. Having Experience with FPGA based Families like Actel ProASIC3 and IGLOO. Having Experience with SoC FPGAs based Families like Actel A2F Series, Xilinx Zynq XA7020 Having Experience with Processors like ADSP21060, ADSP21062 and TMS320F2810. Having Experience with Texas CC3200 Zigbee. Having Experience with IOT project Having experience in BOM Preparation, Components selections for Military & domestic Having Experience on Converter types like ADC and DAC Mostly working on LVDT, OP-AMP(TI & analog Devices), LCD display, CPLD and Flash Communication protocol like UART, DDR2, Ethernet SPI, I2C, WIFI, USB, PCI and MIL-STD-1553B. Having Experience in serial interfaces like RS232, RS422 and RS485 Selection of power supply design like switching regulators and Linear Regulator. Having Knowledge on EMI/EMC guidelines on Layout. To actively take the part in involving Product and handle complete hardware design cycle in project. Boot loader program implementation for IAP and Application Modes in eNVM Expertise in lab Instruments: Oscilloscope, Function generators, Bus analyzers Tools: Schematic Tools: Cadence (OrCAD), Altium Design and Mentor Graphics (DxDesigner). PCB Tools : Allegro, PADs and Cadstar Simulation Tools: PSpice速 A/D, LTspice. FPGA Programming tools like Libero IDE, LiberoSoC Good C fundamentals HDL : Verilog, VHDL HDL Simulation Tools : Questasim, Modelsim 1
  • 2. PROFESSIONAL EXPERIENCE: Project 1: Design and Implemented of Logic Board LRF Company: Reliable Techno Systems India (P) Ltd Client: IRDE, Hyderabad Role: Hardware Design Engineer Tools: Vivado Design Suite, Orcad capture, Pspice, Allegro Period: 8 Months Description: The Logic board is one of the modules from LRF (Lesser Ray Finder).This is intermediate communication module. It contains zinq (XA7Z020) processor is collecting the data from High voltage power supply signal, video signals, Trigger signal from other module. Decoding this information and passing through uart and I2c to other main module. Roles & Responsibilities: Hardware Design and Development of full project. Understanding different types of components ADSP, FPGA, ADC, DAC, UART, Mil-std 1553 and Flash. BOM preparing, Components placements guidelines and Isolations discussions with client. Board level, System level Debugging, integrating and product delivery. Project 1: Design of Dual Channel Digital Actuator Controller (DAC) Company: Reliable Techno Systems India (P) Ltd Client: SINT, Hyderabad Role: Hardware Design Engineer Tools: DxDesigner, Pspice, Flash Pro, Allegro Period: 8Months Description: The Digital Controller is having DSP processor with of 30ns instruction execution capability and used 16- channels ADC and 4-channels DAC. Input signal is giving to Mil-std1553 or through ADC to interact with the main system. Since the Controller is going to place within the missile, all of the components were chosen as per Mil STDs. The OBC will control the position and velocity of the linear actuator with the main system command signal .The linear actuator is consist BLDC motor and LVDT. The PID technique used to control the position & velocity is analog PWM technique. Roles & Responsibilities: Hardware Design and Development of full project. Understanding different types of components ADSP, FPGA, ADC, DAC, UART, Mil-std 1553 and Flash. BOM preparing, Components placements guidelines and Isolations discussions with client. Board level, System level Debugging, integrating and product delivery. Project 2: Smart Weighing WIFI Company: Reliable Techno Systems India (P) Ltd Client: Smatron pvt ltd Role: Senior HW Design Engineer Tools: Orcad Capture, LTSpice, Cadstar Period: 5 Months 2
  • 3. Description: The Smart WIFI is containing Texas CC3200 Micro controller. It has 4 channels 12-bit ADC and Integrated WiFi. We used FTDI IC for converting data from USB to UART. Using weight from strain gauge reading the data through adc and passing through wifi to cloud from that to using android app will know the status, as well as displaying on LCD. Roles & Responsibilities: Hardware Design and development of full project BOM preparation ,component selection like CC3200, FT223D and base selection Interacting the layout designer for component placement. Understanding different Interfaces like USB, LCD and WIFI. Project 3: TRILOGY eEDI Company: CMC LTD Client: Schneider Electric Role: Senior HW Design Engineer Tools: DxDesigner, LTSpice, Cadstar Period: 5 Months Description: The eEDI is merging of two boards FDSI-FBM and FCP270. It has an AMD SC520 Microcontroller is used to control the system, this handling communication management between the foreign data systems and the FDSI-FBM. The two internal UARTs of the SC520 (UART1 and UART2) provide interlink between modules and IrDA communication The operating system and all static code will be stored in 2 Flash memory chips connected to the GP Address Bus and the SDRAM data bus. Roles & Responsibilities: Merging the two board schematic in Dxdesigner Interacting with client for design changes and updates. Interacting the layout designer for component placement. Understanding different Interfaces like PCI, Ethernet (RJ-45,SFF,SFP)and Flash. Project 4: Smart Wi-Fi based pond Management Company: Reliable Techno Systems India (P) Ltd Role: Design Engineer Tools: DxDesigner, Pspice, Flash Pro, Soft console, Allegro Period: 8 Months Description: This is Zigbee based IOT project and the Pond management is consisting of continuously monitoring 3 module. They are Aqua status monitor, Sensor Module and Aerator control module. In that we used GSM900 for getting the information in Msg format and Using CC3200 for data sent to cloud location, data read through the android App. Based on the sensor module report, auotomatically on the Aerators. Roles & Responsibilities: Complete hardware design Interacting with client for design changes and updates Preparation of Design documents, Layout guidelines & Test Report Summary documents. Hardware Debugging, system level Testing and Product delivery. 3
  • 4. Project 5: ASTRA Rotary Electro Mechanical Actuator (REMA). Company: Reliable Techno Systems India (P) Ltd Client: RCI, Hyderabad Role: Design Engineer Tools: Orcad, Pspice, Allegro Period: 10 Months Description: Actuator Electronics System is a sub-system of Rotary Electro Mechanical Actuator (REMA). This system is designed to drive the three phases Brush Less DC (BLDC) Motor. It receives position, velocity and current feedback signals from Rotary potentiometer, speed control adapter and current sensors respectively. The Hall Effect sensors provide rotor position information required for electronic commutation. Based on the above sensors information, position, velocity and current loops are executed to deliver the power to the motor. Roles & Responsibilities: Schematic Design using orcad and involved in board level bring up Open-Loop and Closed-loop Performance tests checking Preparation of Design documents, Layout guidelines & Test Report Summary documents. Involved in Environmental tests like Burning test, Thermal test and dump test. Project 6: Electronic controller design for Electro mechanical Actuator (EMA) Company: Reliable Techno Systems India Pvt Ltd. Client: RCI, Hyderabad Role: Test Engineer Tools: Altium, Pspice, Visual DSP++, Allegro Period: 8 Months Description: The EMA used to test different types of motors and observing the speed of motor and current consuming of each coil. The observed values displayed on LCD display. The OPC is featured with Advanced ACTELs FPGA (Smart Fusion) which is having Cortex-M3 micro controller, ABPS, ADC, DAC, UART, I2C, SPI and GPIOs. Here The FPGA read the data from Current sensors and Hall sensor, and display the motor speed and current on the LCD Display. Here we also use motor control IC for to control motor. It receives position, velocity and current feedback signals from LVDT, speed control adapter which is a tacho processing circuit and current sensors respectively. Roles & Responsibilities: Involved Hardware design and development Open-Loop and Closed-loop Performance tests checking Understanding different types of components FPGA, Motor Control IC, LCD and MOSFETs. PCB Placement , keeping isolation and processor data & address lines Length matching Board level and System level Debugging and Testing. Academic Profile: M.Tech in VLSI System Design from JNTU HYD 82% 20013-15. B.Tech in Electronics & Comm. from JNTU HYD 67% 2006-10. 4
  • 5. Intermediate from Board of Intermediate Education 80.7% 2004-06. SSC from Board of Secondary Education 76.9% 2003-04 Personal Profile: Name : Narasimha Reddy Karnati Fathers name : Veera Reddy Date of birth : 05-08-1989 Martial status : Single Nationality : Indian Address : Plot No:170, Telecom nagar, Gachhibowli, Hyderabad -500032 Declaration: I do hereby confirm that the facts given by me in this bio-data is true to the best of my knowledge. Place : Hyderabad. Yours Truly, Date : Narasimha Reddy Karnati 5
  • 6. Intermediate from Board of Intermediate Education 80.7% 2004-06. SSC from Board of Secondary Education 76.9% 2003-04 Personal Profile: Name : Narasimha Reddy Karnati Fathers name : Veera Reddy Date of birth : 05-08-1989 Martial status : Single Nationality : Indian Address : Plot No:170, Telecom nagar, Gachhibowli, Hyderabad -500032 Declaration: I do hereby confirm that the facts given by me in this bio-data is true to the best of my knowledge. Place : Hyderabad. Yours Truly, Date : Narasimha Reddy Karnati 5