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- 1. JERICKSON V. DAYRIT 180 P. Gomez St., Bagong Barrio, Caloocan City jayjaydayrit@yahoo.com 0917 857 27 01 PERSONAL INFORMATION Gender: Male Marital Status: Single Nationality: Filipino Permanent Residence: Philippines Age: 24 Date of Birth: June 10, 1991 SKILLS Basic skills on C/C++, Visual Basic, Awk, Assembly and Matlab programming Experience in using Gvim Experience in using the Teradyne IG-XL, UNIX environment and pattern generation Basic skills in simulation tools such as PSPICE, and Packet Tracer Knowledge of Telephone network design, Microprocessor design, basic antenna construction, and Bidding Documents TSMC memory testing EDUCATION HISTORY Tertiary (2008-2013) University of Santo Tomas Secondary (2004-2008) De La Salle Araneta University Primary (1996-2004) De La Salle Araneta University (Formerly Gregorio Araneta University Foundation) ORGANIZATION Cisco Networking Academy Gateway -Internal Vice President (2012-2013) -Assistant Vice President for Documentation (2011-2012) -member(2010-2011) Dx1 Amateur UST Radio Club -Committee head for Events(2011-2013) AWARDS RECEIVED/DISTINCTIONS Consistent Deans Lister (2008-2013) - Faculty of Engineering, University of Santo Tomas Awarded 2nd best for the thesis entitled Eye Controlled Numerical Keypad for the ECE department thesis exhibit 2nd best Microprocessor Design ECE Department Graduated as Valedictorian (April 2008)-De La Salle Araneta University Manuel Villar Excellence Award recipient(2008) - De La Salle Araneta University CERTIFICATIONS AND LICENSES Certification on CCNA: Routing Protocols and Concepts - Faculty of Engineering, University of Santo Tomas(2011) Certification on CCNA: Network Fundamentals - Faculty of Engineering, University of Santo Tomas (2010) Electronics Engineering Licensee -license no. 0057576 with General Average:80.2 (2013) SEMINARS AND PROGRAMS CONDUCTED August 2011
- 2. 3rd Cisco Networking Academy Gateway General Assembly and Technical Seminar Facilitator, AMV Multi-purpose Hall, University of Santo Tomas, Manila November 2011 Asian Institute of Computer Studies Cisco Skills Competition Facilitator, Marikina Sports Complex WORK EXPERIENCE April-May 2013 Internship at Smart Communications packet core division -includes Monitoring the network, Routine checking of internet availability and other services such as SMS, call, MMS and BBM services, presentation of network flows of their different services, studying the basic Network Topology, Systems Training and Complaints Handling via CSP and T3 February 2014 present Test Engineer at MTI Advanced Development Corp also known as Microchip Part of the MCU16 group Experienced using IG-XL v3.4 and v3.6 HD Data Crunching or manipulations for characterization data using Awk programming Visual Basic (VBA) Programming for different templates, calibration and characterization MPLAB programming to test different modules and features of our devices using Assembly and C++ languages Basic unix experience in simulating patterns in a virtual pc. Developed test instances for sort as well as final tests Critical Characterization for new and sustaining products(Probe and FT) Created and debugged Test Program Reviewer prior to release o Analog/parametric tests -Idd/Iidle for different clock sources such as frc, external clock, low power rc etc. -Ipd/Ipdwdt/Idoze/IpdRTCC/IpdHLVD/IpdBOR -Open drain -Leakage -Pull up and pull down currents -O/S -Charge Time Measurement Unit tests( Linearity, temp sense and ranges) -Comparator Offset o Functional -Input Levels Test for all pins (with external clock, crystal and high speed clock sources) -Output levels test for all pins(with external clock, crystal and high speed clock sources) -O/S -JTAG test - high voltage stress testing and low voltage high frequency test - Analog to Digital Conversion -ADC input pad tests (pins, CTMu, Avdd, Avss as inputs) - Low Voltage Detect test at different trip points - Brown out Reset - Passcode writes and reads o Fuse Configuration (write and erases) o Memory Tests -TSMC programming(unique data programming test) -Microchip programming and erase using In Circuit Serial Programming generated through
- 3. unix and test mode programming, usermode programming using Assembly. Worked with 8 masks (5 sustaining and three new product) HW design: Co-designed for a new product daughter card (schematic) J750 Calibration for all the boards or slots (Quick Check, Module Check, Performance External and Internal Calibration etc..) THAILAND Production Training o Exposure to Production site o Product ownership with Test Program and Test Flow revision releases o Hardware setup change releases o Issue disposition for strips o Served as production support for test engineers o Hands on with probe setup, HD tester and basic j750 tester o yield report analysis CHARACTER REFERENCE Engr. Mark Lester Sayson 09272094073 MTI MCU16 Test Engineer (Teammate) Engr. Mike Gomez 09224822618 MTI Application Engineer