際際滷

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Semi Design Presents..
N-MOS Fabrication Process
Fig. (1) Pure Si single crystal
Si-substrate
Fig. (2) P-type impurity is lightly
doped
- - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - -
N-MOS Fabrication Process
Fig. (3) SiO2 Deposited over si surface
Fig. (4) Photoresist is deposited
over SiO2 layer
Thick SiO2
(1 袖m)
Photoresist
Thick SiO2
(1 袖m)
- - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - -
N-MOS Fabrication Process
Fig. (5) Photoresist layer is
exposed to UV Light through a
mask
Photoresist
Thick SiO2
(1 袖m)
UV Light
Mask-1
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Mask-1 is used to expose the SiO2
where S, D and G is to be formed.
N-MOS Fabrication Process
Fig. (6) Developer removes unpolymerised photoresist. It
will cause no effect on Si surface
Polymerised
Photoresist
Thick SiO2
(1 袖m)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
N-MOS Fabrication Process
Fig. (7) Etching [HF acid is used] will remove SiO2 layer
which is in direct contact with etching solution
Thick SiO2
(1 袖m)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
N-MOS Fabrication Process
Fig. (7) unpolymerised photoresist is also etched away
[using H2SO4]
Thick SiO2
(1 袖m)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
N-MOS Fabrication Process
Fig. (8) A thin layer of SiO2 grown over the entire chip surface
Thick SiO2
(1 袖m)
Thin SiO2
(0.1 袖m)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
N-MOS Fabrication Process
Fig. (9) A thin layer of polysilicon is grown over the entire chip
surface to form GATE
Thick SiO2
(1 袖m)
Thin SiO2
(0.1 袖m)
Polysilicon layer
(1  2 袖m)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
N-MOS Fabrication Process
Fig. (10) A layer of photoresist is grown over polysilicon layer
Thick SiO2
(1 袖m)
Thin SiO2
(0.1 袖m)
Polysilicon
layer
Photoresist
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
N-MOS Fabrication Process
Fig. (11) Photoresist is exposed to UV Light
UV Light
Mask-2
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Mask-2 is used to deposit
Polysilicon to form gate.
N-MOS Fabrication Process
Fig. (12) Etching will remove that portion of Thin SiO2 which is
not exposed to UV light
Thick SiO2
(1 袖m)
Thin SiO2
(0.1 袖m)
Polysilicon
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
N-MOS Fabrication Process
Fig. (13) Polymerised photoresist is also stripped away
Thick SiO2
(1 袖m)
Thin SiO2
(0.1 袖m)
Polysilicon used as GATE
(1  2 袖m)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
N-MOS Fabrication Process
Fig. (14) n+ Doping to form SOURCE and DRAIN
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Thick SiO2
(1 袖m)
Thin SiO2
(0.1 袖m)
GATE
- - -
- - -
n+
- - - -
- -
n+
SOURCE DRAIN
N-MOS Fabrication Process
Step - Metallization
Fig. (15) A thick layer of SiO2 (1 袖m) is again grown.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Thick SiO2
(1 袖m)
- - -
- - -
n+
- - - -
- -
n+ Thick SiO2
(1 袖m)
N-MOS Fabrication Process
Step - Metallization
Fig. (16) Photoresist is grown over thick SiO2. Selected areas of the poly GATE and SOURCE and
DRAIN are exposed where contact cuts are to be made
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Thick SiO2
(1 袖m)
- - -
- - -
n+
- - - -
- -
n+ Thick SiO2
(1 袖m)
Photoresist
Mask-3
UV Light
Mask-3 is used to make contact cuts for S, D and G.
N-MOS Fabrication Process
Step - Metallization
Fig. (17) The region of photoresist which is not exposed by UV light will become soft. This
unpolymerised photoresist and SiO2 below it are etched away.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Thick SiO2
(1 袖m)
- - -
- - -
n+
- - - -
- -
n+ Thick SiO2
(1 袖m)
Photoresist
Mask-3
N-MOS Fabrication Process
Step - Metallization
Fig. (18) The contact cuts are formed for S, D and G (hardened photoresist is stripped away).
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Thick SiO2
(1 袖m)
- - -
- - -
n+
- - - -
- -
n+ Thick SiO2
(1 袖m)
Photoresist
Mask-3
N-MOS Fabrication Process
Step - Metallization
Fig. (19) Metal (aluminium) is deposited over the surface of whole chip (1 袖m thickness).
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Thick SiO2
(1 袖m)
- - -
- - -
n+
- - - -
- -
n+ Thick SiO2
(1 袖m)
Metal (1袖m)
N-MOS Fabrication Process
Step - Metallization
Fig. (20) Photoresist is deposited over the metal.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Thick SiO2
(1 袖m)
- - -
- - -
n+
- - - -
- -
n+ Thick SiO2
(1 袖m)
Metal (1袖m)
Photoresist
N-MOS Fabrication Process
Step - Metallization
Fig. (21) UV Light is passed through Mask-4 (with a aim of removing all metal other than metal in
contact-cuts).
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Thick SiO2
(1 袖m)
- - -
- - -
n+
- - - -
- -
n+ Thick SiO2
(1 袖m)
Metal (1袖m)
Photoresist
UV Light
Mask-4
Mask-4 is used to deposit metal in contact cuts of S, D and G.
N-MOS Fabrication Process
Step - Metallization
Fig. (22) Photoresist and metal which is not exposed to UV light are etched away.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Thick SiO2
(1 袖m)
- - -
- - -
n+
- - - -
- -
n+ Thick SiO2
(1 袖m)
Metal (1袖m)
Photoresist
Mask-4
N-MOS Fabrication Process
Step - Metallization
Fig. (23) Final n-MOS Transistor
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
-- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
- - -
- - -
n+
- - - -
- -
n+
SOURCE DRAIN
GATE
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n-MOS Fabrication Process

  • 2. N-MOS Fabrication Process Fig. (1) Pure Si single crystal Si-substrate Fig. (2) P-type impurity is lightly doped - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
  • 3. N-MOS Fabrication Process Fig. (3) SiO2 Deposited over si surface Fig. (4) Photoresist is deposited over SiO2 layer Thick SiO2 (1 袖m) Photoresist Thick SiO2 (1 袖m) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
  • 4. N-MOS Fabrication Process Fig. (5) Photoresist layer is exposed to UV Light through a mask Photoresist Thick SiO2 (1 袖m) UV Light Mask-1 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Mask-1 is used to expose the SiO2 where S, D and G is to be formed.
  • 5. N-MOS Fabrication Process Fig. (6) Developer removes unpolymerised photoresist. It will cause no effect on Si surface Polymerised Photoresist Thick SiO2 (1 袖m) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
  • 6. N-MOS Fabrication Process Fig. (7) Etching [HF acid is used] will remove SiO2 layer which is in direct contact with etching solution Thick SiO2 (1 袖m) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
  • 7. N-MOS Fabrication Process Fig. (7) unpolymerised photoresist is also etched away [using H2SO4] Thick SiO2 (1 袖m) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
  • 8. N-MOS Fabrication Process Fig. (8) A thin layer of SiO2 grown over the entire chip surface Thick SiO2 (1 袖m) Thin SiO2 (0.1 袖m) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
  • 9. N-MOS Fabrication Process Fig. (9) A thin layer of polysilicon is grown over the entire chip surface to form GATE Thick SiO2 (1 袖m) Thin SiO2 (0.1 袖m) Polysilicon layer (1 2 袖m) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
  • 10. N-MOS Fabrication Process Fig. (10) A layer of photoresist is grown over polysilicon layer Thick SiO2 (1 袖m) Thin SiO2 (0.1 袖m) Polysilicon layer Photoresist - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
  • 11. N-MOS Fabrication Process Fig. (11) Photoresist is exposed to UV Light UV Light Mask-2 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Mask-2 is used to deposit Polysilicon to form gate.
  • 12. N-MOS Fabrication Process Fig. (12) Etching will remove that portion of Thin SiO2 which is not exposed to UV light Thick SiO2 (1 袖m) Thin SiO2 (0.1 袖m) Polysilicon - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
  • 13. N-MOS Fabrication Process Fig. (13) Polymerised photoresist is also stripped away Thick SiO2 (1 袖m) Thin SiO2 (0.1 袖m) Polysilicon used as GATE (1 2 袖m) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
  • 14. N-MOS Fabrication Process Fig. (14) n+ Doping to form SOURCE and DRAIN - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Thick SiO2 (1 袖m) Thin SiO2 (0.1 袖m) GATE - - - - - - n+ - - - - - - n+ SOURCE DRAIN
  • 15. N-MOS Fabrication Process Step - Metallization Fig. (15) A thick layer of SiO2 (1 袖m) is again grown. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Thick SiO2 (1 袖m) - - - - - - n+ - - - - - - n+ Thick SiO2 (1 袖m)
  • 16. N-MOS Fabrication Process Step - Metallization Fig. (16) Photoresist is grown over thick SiO2. Selected areas of the poly GATE and SOURCE and DRAIN are exposed where contact cuts are to be made - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Thick SiO2 (1 袖m) - - - - - - n+ - - - - - - n+ Thick SiO2 (1 袖m) Photoresist Mask-3 UV Light Mask-3 is used to make contact cuts for S, D and G.
  • 17. N-MOS Fabrication Process Step - Metallization Fig. (17) The region of photoresist which is not exposed by UV light will become soft. This unpolymerised photoresist and SiO2 below it are etched away. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Thick SiO2 (1 袖m) - - - - - - n+ - - - - - - n+ Thick SiO2 (1 袖m) Photoresist Mask-3
  • 18. N-MOS Fabrication Process Step - Metallization Fig. (18) The contact cuts are formed for S, D and G (hardened photoresist is stripped away). - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Thick SiO2 (1 袖m) - - - - - - n+ - - - - - - n+ Thick SiO2 (1 袖m) Photoresist Mask-3
  • 19. N-MOS Fabrication Process Step - Metallization Fig. (19) Metal (aluminium) is deposited over the surface of whole chip (1 袖m thickness). - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Thick SiO2 (1 袖m) - - - - - - n+ - - - - - - n+ Thick SiO2 (1 袖m) Metal (1袖m)
  • 20. N-MOS Fabrication Process Step - Metallization Fig. (20) Photoresist is deposited over the metal. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Thick SiO2 (1 袖m) - - - - - - n+ - - - - - - n+ Thick SiO2 (1 袖m) Metal (1袖m) Photoresist
  • 21. N-MOS Fabrication Process Step - Metallization Fig. (21) UV Light is passed through Mask-4 (with a aim of removing all metal other than metal in contact-cuts). - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Thick SiO2 (1 袖m) - - - - - - n+ - - - - - - n+ Thick SiO2 (1 袖m) Metal (1袖m) Photoresist UV Light Mask-4 Mask-4 is used to deposit metal in contact cuts of S, D and G.
  • 22. N-MOS Fabrication Process Step - Metallization Fig. (22) Photoresist and metal which is not exposed to UV light are etched away. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Thick SiO2 (1 袖m) - - - - - - n+ - - - - - - n+ Thick SiO2 (1 袖m) Metal (1袖m) Photoresist Mask-4
  • 23. N-MOS Fabrication Process Step - Metallization Fig. (23) Final n-MOS Transistor - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - n+ - - - - - - n+ SOURCE DRAIN GATE