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Prasad Enamalli

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Prasad Enamalli is seeking a position that utilizes his analytical, interpersonal, leadership and organizational skills. He has a B.Tech. in Electronics and Communication engineering with distinction and experience developing firmware and documenting standards of operation. His academic project involved designing a low power, high speed truncation error tolerant adder using Xilinx ISE and Modelsim. He is proficient in C, C#.Net, ASP.Net, HTML, JavaScript and Linux/Windows and completed .Net training at APTECH Computer Education.

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PRASAD ENAMALLI Email:prasad0414@gmail.com Mob No: +91-8088153358 +91-9492659624 CARRER OBJECTIVES To work in a competitive environment that effectively utilizes my analytical, interpersonal, leadership and organizational skills to conceive and achieve solutions. Looking for international exposure EDUCATION B.Tech., in Electronics and Communication engineering | 2009 2013 Shree institute of technical education| Tirupati | Distinction (70.42%) Intermediate from Vikas Junior College | 2007 2009 | | B N Kandriga | Distinction (84%) 10th from Z P High school | 2006 - 2007 | | Nelavai | Distinction (75.3%) TECHNICAL SKILLS Programming Language C,C#.Net Technologies ASP.Net Webbased HTML, JavaScript OperatingSystem Windows, Linux ACADEMIC PROJECT DETAILS Project Name: DESIGN OF LOW POWER HIGH SPEED TRUNCATIONERROR TOLERANT ADDER(ETA) Duration 2months Team Size 4 Organization Academic Project Technologies Xilinx ISE13.1, Modelsim 10.0C,FPGA Kit Description The ETA can attaingreat improvementinboththe power consumptionandspeedperformance By sacrificing some accuracy. It consists of two parts: an accurate part and an inaccurate part. The accurate part is constructedusinga conventional adder such as the RCA, CSK, CSL, or CLA. The carry-inof thisadderis connectedtoground.The inaccurate part constitutestwo blocks: a carry-free additionblockandacontrol block.The control block is used to generate the control signals, to determine the working mode of the carry-free addition block. It is used In image processing and many other DSP applications. Responsibilities Customised firmware & code Development, Documentation of the Standard of Operation and developed firmware.
TRAINING&CERTIFICATION I have done my .Net training in APTECH Computer Education, Hyderabad ACHIEVEMENTS Participated in Tech Fest at JNTU college of engineering, pulivendula for a Paper presentation. Won prizes on school level science project competitions. Organized a technical & cultural events held in our college. STRENGTHS Amiable Ability to learn fast, easily adaptable. Confident and hard working. PERSONAL INFORMATION Fathers Name Gururathnam E Gender Male Date of Birth 03/06/1992 Nationality Indian Marital Status Single Linguistic Abilities Telugu, English, Hindi(Can manage) Hobbies Playing Cricket ,Watching TV and Listening to music Address #163 Bandepalya Garebhavi playa,7th Main Hosur Road, Bangalore Karnataka-560068 DECLARATION: I hereby declare that the above-furnished information is correct and I am responsible for its accuracy. Place: Bangalore Date: [Prasad E]

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Prasad Enamalli

  • 1. PRASAD ENAMALLI Email:prasad0414@gmail.com Mob No: +91-8088153358 +91-9492659624 CARRER OBJECTIVES To work in a competitive environment that effectively utilizes my analytical, interpersonal, leadership and organizational skills to conceive and achieve solutions. Looking for international exposure EDUCATION B.Tech., in Electronics and Communication engineering | 2009 2013 Shree institute of technical education| Tirupati | Distinction (70.42%) Intermediate from Vikas Junior College | 2007 2009 | | B N Kandriga | Distinction (84%) 10th from Z P High school | 2006 - 2007 | | Nelavai | Distinction (75.3%) TECHNICAL SKILLS Programming Language C,C#.Net Technologies ASP.Net Webbased HTML, JavaScript OperatingSystem Windows, Linux ACADEMIC PROJECT DETAILS Project Name: DESIGN OF LOW POWER HIGH SPEED TRUNCATIONERROR TOLERANT ADDER(ETA) Duration 2months Team Size 4 Organization Academic Project Technologies Xilinx ISE13.1, Modelsim 10.0C,FPGA Kit Description The ETA can attaingreat improvementinboththe power consumptionandspeedperformance By sacrificing some accuracy. It consists of two parts: an accurate part and an inaccurate part. The accurate part is constructedusinga conventional adder such as the RCA, CSK, CSL, or CLA. The carry-inof thisadderis connectedtoground.The inaccurate part constitutestwo blocks: a carry-free additionblockandacontrol block.The control block is used to generate the control signals, to determine the working mode of the carry-free addition block. It is used In image processing and many other DSP applications. Responsibilities Customised firmware & code Development, Documentation of the Standard of Operation and developed firmware.
  • 2. TRAINING&CERTIFICATION I have done my .Net training in APTECH Computer Education, Hyderabad ACHIEVEMENTS Participated in Tech Fest at JNTU college of engineering, pulivendula for a Paper presentation. Won prizes on school level science project competitions. Organized a technical & cultural events held in our college. STRENGTHS Amiable Ability to learn fast, easily adaptable. Confident and hard working. PERSONAL INFORMATION Fathers Name Gururathnam E Gender Male Date of Birth 03/06/1992 Nationality Indian Marital Status Single Linguistic Abilities Telugu, English, Hindi(Can manage) Hobbies Playing Cricket ,Watching TV and Listening to music Address #163 Bandepalya Garebhavi playa,7th Main Hosur Road, Bangalore Karnataka-560068 DECLARATION: I hereby declare that the above-furnished information is correct and I am responsible for its accuracy. Place: Bangalore Date: [Prasad E]