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R.CHANDRAKANTH SAI
Nacharam, Hyderabad
+91-8686554239
chandrakanthrechintala@gmail.com
Objective:
To make sincere and continuous efforts towards building a promising career and to take challenges in
life so that I can contribute to the growth and success of the organization I am working with.
Education:
Duration Course Name of institute Percentage
2009-2013 B. Tech Electronics
and communication
Suprabath college of
engineering and
technology,Hyderabad
67.3%
2008-2009 INTERMEDIATE Narayana Junior college
Hyderabad.
68%
2007 SSC Dr.S. Hussain Zaheer
Memorial High School,
Hyderabad
67%
Technical Skills:
languages C
Packages Ms Office,Open Office, MS-outlook
Operating System Windows XP Professional
Academic Project Details:
Mini Project:
Title : Anti Sleep Alarm
Organization : Suprabath College of Engineering and Technology
Team Size : 3
Platform : EMBEDDED SYSTEMS (IC Technology)
Description:
This circuit works based on integrated circuit which acts as a timer .Here IC4020 and IC
4093,relay,buzzer are used. IC 4093 acts as astable multivibrator and generates clock signal,gives to
timer which gives beep sound.This ckt saves time and electricity.when person is awake during beep can
reset again,if timer is not reset,after some seconds it will switch off light and fan in the room ,thus
saving electricity.
Main Project:
Title : A Robust FSM Watermarking scheme
Organisation : Suprabath College of Engineering and Technology
Team size : 4
Platform : EMBEDDED SYSTEMS (Microcontroller)
Description:
The FSM watermark is highly relevant to all conceivable watermark attacks. The redundancy in the FSM
has been effectively utilized to minimize the embedding overhead. By increasing the length of input
code sequence for watermark retrieval and allowing the output compatible transitions to be revisited to
embed different watermark bits, the watermarks are more randomly dispersed and better concealed in
the existing transitions of FSM.
Scope: Can be implemented in dynamic FSM
Personal Details:
Name : R. Chanrakanth Sai
Father Name : R. Ellesh
Mother Name : R. Rajya Lakshmi
Date of Birth : 30/Nov/1991
Sex : Male
Marital Status : Single
Nationality : Indian
Address : 4-3-99/1, Nacharam, Hyderabad.
Extra Curricular Activities:
• Completed the course in CELT(CENTRE FOR ENGLISH LANGUAGE TRAINING) in O.U (Communication
skills and personality Development).
• Participated in a workshop on matlab in VIT(vellore institute of technology)
• Participated in Technical quiz in vignan institute of technology and science
• Participated in paper presentation in VIGNAN'S institute of technology & Aeronoutical engg..
Declaration:
I hereby declare that all the information given in this form is true to the best of my Knowledge.
Place: HYDERABAD
Date:
Your’s Sincerely
R. Chandrakanth Sai

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R.chandrakanth sai

  • 1. R.CHANDRAKANTH SAI Nacharam, Hyderabad +91-8686554239 chandrakanthrechintala@gmail.com Objective: To make sincere and continuous efforts towards building a promising career and to take challenges in life so that I can contribute to the growth and success of the organization I am working with. Education: Duration Course Name of institute Percentage 2009-2013 B. Tech Electronics and communication Suprabath college of engineering and technology,Hyderabad 67.3% 2008-2009 INTERMEDIATE Narayana Junior college Hyderabad. 68% 2007 SSC Dr.S. Hussain Zaheer Memorial High School, Hyderabad 67% Technical Skills: languages C Packages Ms Office,Open Office, MS-outlook Operating System Windows XP Professional Academic Project Details: Mini Project: Title : Anti Sleep Alarm Organization : Suprabath College of Engineering and Technology Team Size : 3 Platform : EMBEDDED SYSTEMS (IC Technology) Description: This circuit works based on integrated circuit which acts as a timer .Here IC4020 and IC 4093,relay,buzzer are used. IC 4093 acts as astable multivibrator and generates clock signal,gives to timer which gives beep sound.This ckt saves time and electricity.when person is awake during beep can
  • 2. reset again,if timer is not reset,after some seconds it will switch off light and fan in the room ,thus saving electricity. Main Project: Title : A Robust FSM Watermarking scheme Organisation : Suprabath College of Engineering and Technology Team size : 4 Platform : EMBEDDED SYSTEMS (Microcontroller) Description: The FSM watermark is highly relevant to all conceivable watermark attacks. The redundancy in the FSM has been effectively utilized to minimize the embedding overhead. By increasing the length of input code sequence for watermark retrieval and allowing the output compatible transitions to be revisited to embed different watermark bits, the watermarks are more randomly dispersed and better concealed in the existing transitions of FSM. Scope: Can be implemented in dynamic FSM Personal Details: Name : R. Chanrakanth Sai Father Name : R. Ellesh Mother Name : R. Rajya Lakshmi Date of Birth : 30/Nov/1991 Sex : Male Marital Status : Single Nationality : Indian Address : 4-3-99/1, Nacharam, Hyderabad. Extra Curricular Activities: • Completed the course in CELT(CENTRE FOR ENGLISH LANGUAGE TRAINING) in O.U (Communication skills and personality Development). • Participated in a workshop on matlab in VIT(vellore institute of technology) • Participated in Technical quiz in vignan institute of technology and science • Participated in paper presentation in VIGNAN'S institute of technology & Aeronoutical engg.. Declaration: I hereby declare that all the information given in this form is true to the best of my Knowledge. Place: HYDERABAD Date: Your’s Sincerely R. Chandrakanth Sai